Abstract: An analysis method for analyzing a consequent effect of a fabrication machine cluster is provided. The method uses an AND logic algorithm to compare a fabrication machine cluster having a low yield rate with a fabrication machine cluster having a high yield rate. Each fabrication machine cluster includes a series of machines. Each of machine is used in a fabrication process. If an element machine used in a process for the fabrication machine cluster having a low yield rate is different from an element machine used in the same process for the fabrication machine cluster having a high yield rate, a logic result is indicated as “0”. Otherwise, the logic result is indicated as “1”. A modification of the fabrication cluster may be done by replacing the machine indicated by “0” with other available machine.

Abstract: A method of forming a test key architecture on a silicon wafer. The method includes forming trench isolation regions between a source region and a drain region. Thereafter, a plurality of active regions are formed in parallel above the trench isolation regions such that the smallest possible width for each active region is chosen to reduce overall area occupation and increase the number of test keys. Next, a long pass gate is formed above the trench isolation regions, crossing and covering the parallel-connected active regions. Consequently, the effect due to stress-induced defect and the probability of leakage current due to parasitic device effect are greatly increased.

Abstract: A method for measuring kink effect of a first semiconductor device including the following steps is disclosed herein. Firstly, choose a second and a third semiconductor device. The first, the second and the third semiconductor device have the same channel length and different channel width. The next step, apply a voltage on the drain electrode of respective semiconductor device. The voltage is applied to the drain electrode and the DIBL effect is avoided. The following step, measure the threshold voltage of every. Next, measure the source to drain current by applying the respective threshold voltages on the respective gate electrode of every semiconductor device. Subsequently, generates a slope by dividing a first drain current difference by a first channel width difference. The first drain current difference is formed of subtracting a second drain to source current of the second semiconductor devices by and a third drain to source current of the third semiconductor device.

Abstract: A method for measuring the extent of the kink effect of a transistor is disclosed herein. The aforementioned method includes the following steps. The first, generate a simulated drain current versus a gate voltage according to the transistor. Secondary, generate a drain current versus the gate voltage. Finally, integrate a difference between the simulated drain current and the drain current by the gate voltage.

Abstract: A test connecting device including testkey and probe card for use in the testing of integrated circuits is provided. This test connecting device features the use of a symmetrical node-potential scheme that can offset the parasite capacitances between the probe pins on the probe card, thus allowing an increase in frequency response of the probe card. The probe card includes at least six probe pins arranged in a row; and correspondingly, the testkey includes at least six test pads for the six probe pins to make electrical contacts with them during the testing while the probe card is coupled to the testkey. This test connecting device can allow a high-frequency output signal to pass therethrough to the test instrument without causing attenuation to the signal. Moreover, the use of the test connecting device can eliminate the need to install additional hardware components, such as frequency dividers or additional stages to ring oscillators.