Abstract: A wake-up method and apparatus, a storage medium and a terminal are provided. The method includes: monitoring a wake-up Physical Downlink Control Channel (PDCCH); if detecting the wake-up PDCCH, determining to enter a wake-up mode; or if detecting the wake-up PDCCH, and wake-up indication information in Downlink Control Information (DCI) transmitted by the wake-up PDCCH indicates to enter the wake-up mode, determining to enter the wake-up mode, wherein entering the wake-up mode comprises starting an onDurationTimer and/or starting a drx-InactivityTimer.

Abstract: A method and apparatus for entering a sleep mode, a storage medium and a user equipment are provided. The method includes: monitoring a Physical Downlink Control Channel (PDCCH) and determining whether to enter a sleep mode, wherein entering the sleep mode includes skipping a duration of PDCCH monitoring occasions or modifying PDCCH configuration.

Abstract: A method for controlling a virtual object to mark a virtual item is provided. The method includes: displaying a virtual environment picture, the virtual environment picture including the virtual object and the virtual item in a virtual environment; controlling the virtual object to move, in the virtual environment, into a proximity range of the virtual item; displaying a pick-up item list on the virtual environment picture, a field of the virtual item available for pick-up being displayed in the pick-up item list; and receiving a mark operation on the field of the virtual item, and marking the virtual item in the virtual environment according to the mark operation, the mark operation being an operation different from a pick-up operation.

Abstract: Electronic paper includes a display panel and a drive component. The display panel may include a plurality of pixels disposed in a display region and a photoelectric conversion transistor disposed in a non-display region. The drive component is electrically connected to the plurality of pixels, and is electrically connected to a current output terminal of the photoelectric conversion transistor.

Abstract: A pivoting clamping assembly includes a carrier, clamping arm pivotably coupled to the carrier and configured to clamp or release a workpiece on the carrier, a lock arranged on the carrier and configured to lock the clamping arm when the clamping arm is rotated toward the workpiece, and at least one clamping block coupled to the clamping arm by a shaft and at least one resilient member. The shaft pivotably couples a pivoting joint of the at least one clamping block to the clamping arm. The at least one resilient member is coupled between the clamping block and the clamping arm.

Abstract: A pivoting clamping assembly includes a carrier, clamping arm pivotably coupled to the carrier and configured to clamp or release a workpiece on the carrier, a lock arranged on the carrier and configured to lock the clamping arm when the clamping arm is rotated toward the workpiece, and at least one clamping block coupled to the clamping arm by a shaft and at least one resilient member. The shaft pivotably couples a pivoting joint of the at least one clamping block to the clamping arm. The at least one resilient member is coupled between the clamping block and the clamping arm.

Abstract: A transceiver circuit including a digital-to-analog converter, a filter coupled to the digital-to-analog converter, a passive mixer coupled to the filter, via a buffer and a multi-stage power amplifier coupled to the passive mixer via a passive amplifier. A transmitter and method for amplifying a RF signal for transmission are also provided.

Abstract: A transmitter circuit with a passive mixer network includes a first outbound signal path configured to carry a first outbound signal. The transmitter circuit includes a second outbound signal path configured to carry a second outbound signal. The transmitter circuit includes N passive mixers coupled to the first and second outbound signal paths and configured to up-convert the first and second outbound signals from a first frequency to a second frequency based on a clock cycle, where N is a positive even integer. The first and second outbound signals are passed through the N passive mixers during each phase of 2*N phases in the clock cycle. The transmitter circuit also includes N radio frequency signal paths coupled to an output of respective ones of the N passive mixers and configured to receive the first and second outbound signals in the second frequency during each phase of the clock cycle.

Abstract: A transmitter circuit with a passive mixer network includes a first outbound signal path configured to carry a first outbound signal. The transmitter circuit includes a second outbound signal path configured to carry a second outbound signal. The transmitter circuit includes N passive mixers coupled to the first and second outbound signal paths and configured to up-convert the first and second outbound signals from a first frequency to a second frequency based on a clock cycle, where N is a positive even integer. The first and second outbound signals are passed through the N passive mixers during each phase of 2*N phases in the clock cycle. The transmitter circuit also includes N radio frequency signal paths coupled to an output of respective ones of the N passive mixers and configured to receive the first and second outbound signals in the second frequency during each phase of the clock cycle.

Abstract: Disclosed are various embodiments for transmitting radio frequency signals. A radio frequency transmitter may be configured to generate an analog signal comprising an in-phase component and a quadrature-phase component. The in-phase component and the quadrature-phase component of the analog signal may be provided to multiple radio frequency processing chains. One of the radio frequency processing chains may generate an output radio frequency signal based on the in-phase component and the quadrature-phase component.

Abstract: A transmitter RF front-end integrated on a single substrate is enabled to determine whether associated IF amplification stage provides a required transmission gain for transmitting an output signal of an application. A dedicated power amplifier driver within the transmitter RF front-end is configured to provide additional gain, when needed based on the determination, to meet the required transmission gain for transmitting the output signal. The associated IF amplification stage comprises an upconversion mixer and a lowpass filter (LPF). The upconversion mixer may be implemented as an active mixer or a passive mixer. The upconversion mixer and the dedicated power amplifier driver are enabled to operate in 2.44 gigahertz. A maximum gain provided by the associated intermediate frequency (IF) amplification stage for transmitting the output signal is determined to decide the additional gain provided by the dedicated power amplifier driver by comparing with the required transmission gain.

Abstract: A transceiver circuit including a digital-to-analog converter, a filter coupled to the digital-to-analog converter, a passive mixer coupled to the filter, via a buffer and a multi-stage power amplifier coupled to the passive mixer via a passive amplifier. A transmitter and method for amplifying a RF signal for transmission are also provided.

Abstract: A center frequency of an adjustable filter is controlled to achieve a compromise between DC offset rejection and image rejection.

Abstract: According to one exemplary embodiment, a method of preventing harmonics from causing distortion in a communications system includes feeding a test signal through a pre-distortion circuit in the communications system to a transmitter in the communications system. The method continues by transmitting a distorted output signal produced by the transmitter to an analyzer, analyzing the distorted output signal to identify one or more undesired harmonics, and generating and sending calibration data from the analyzer to calibrate the pre-distortion circuit, thereby preventing the one or more undesired harmonics from causing distortion in the communications system. In one embodiment, a system to prevent harmonics from causing distortion in a communications system includes a pre-distortion circuit, a transmitter, and an analyzer configured to identify one or more undesired harmonics and to generate and send calibration data to prevent the undesired harmonics from causing distortion.

Abstract: A method and apparatus is disclosed to optimize one or more operational parameters of a communications transmitter to reduce undesirable noise and/or interference embedded within a transmitted communications signal resulting from one or more imperfections. A baseband processor selects one or more calibration signals to allow for optimization of one or more statistical parameters. A calibration module determines the one or more statistical parameters of the transmitted communications signal in response to the one or more calibration signals. The calibration module provides one or more compensation parameters indicative of the one or more statistical parameters to the baseband processor module. The baseband processor adjusts the one or more operational parameters of the communications transmitter in response to the one or more compensation parameters.

Abstract: Aspects of compensating for transmitter output power may comprise sampling an on-chip transmitter circuit temperature at various time instants and determining a feedback temperature compensation value. At least one digital-to-analog converter may be adjusted by utilizing the feedback temperature compensation value, which may correspond to the sampled temperature. The digital-to-analog converter may be an I-component digital-to-analog converter and/or a Q-component digital-to-analog converter. At least a portion of the on-chip transmitter circuit may be characterized to determine power output dependence of the on-chip transmitter circuit on temperature variation of the on-chip transmitter circuit. Based on this characterization, a feedback temperature compensation value that may correspond to the sampled temperature may be used to adjust the digital-to-analog converter. The feedback temperature compensation value may be, for example, from a lookup table or an algorithm.

Abstract: A method and system for output common mode control for reducing DC offset for an IF mixer that downconverts a received signal to DC without introducing additional offset is provided. Aspects of the method may comprise averaging signals having an output common mode DC level, which are generated from an output of the mixer. This determined average may then be compared to a reference voltage. The reference voltage may be an output common mode DC level required for baseband processing. The output common mode DC level may be corrected at an input of the mixer for signals that may subsequently be generated from an output of the mixer by utilizing results from the comparison. The corrected common mode DC offset level may be fed back to an input of the mixer.

Abstract: Aspects of a method and system for an integrated LC resonant current gain boosting amplifier may include amplifying within a chip, via an on-chip LC current gain circuit, an alternating current (AC) generated by an on-chip voltage-to-current converter, and converting within the chip, via an on-chip current-to-voltage circuit; the amplified alternating current to an output voltage. The on-chip LC current gain circuit comprises only passive components, which may include one or more resistors, one or more capacitors, and one or more inductors.