Abstract: The present disclosure relates to a method for providing biomarker for early detection of Alzheimer's Disease (AD), and particularly to a method that is able to enhance the accuracy of predicting AD from Mild Cognitive Impairment (MCI) patients using the Hippocampus magnetic resonance imaging (MRI) scans and Mini-Mental State Examination (MMSE) data. The providing MRI images containing the anatomical structure of Hippocampus biomarker and MMSE data as a training data set; training a processor using the training data set, and the training comprising acts of receiving MRI images and MMSE data as a testing data set from a target; and classifying the test data by the trained processor to include aggregating predictions.

Abstract: Information Handling Systems (IHSs), such as rack-mounted servers, may support various types of replaceable components that are installed in bays, such as storage drives and computing nodes. Some servers are constructed using a chassis that includes a front row of bays and an inner row of bays. In embodiments, in a closed position, the front row of bays conceals the inner row of bays until the front row of bays is rotated horizontally to an open position that provides access to the inner row of bays. The front row of bays may be divided into two banks of drive bays. The left and right banks of bays may be opened separately by rotating them horizontally about hinges connecting each bank to the chassis. By opening in this manner, the inner bays can be administered safely and limiting the forces placed on the chassis and the rack.

Abstract: A detecting device for detecting a stack light state includes a low-pass filter configured to perform low-pass filtering on an input signal to generate a first output voltage; and a logic circuit coupled to the low-pass filter and configured to determine the stack light state according to the first output voltage; wherein the input signal is a pulse width modulation signal and a voltage level of the first output voltage is between a highest voltage level and a lowest voltage level of the pulse width modulation signal.

Abstract: Information Handling Systems (IHSs), such as rack-mounted servers, may support various types of replaceable components that are installed in bays, such as storage drives and computing nodes. Some servers are constructed using a chassis that includes a front row of bays and an inner row of bays. In embodiments, in a closed position, the front row of bays conceals the inner row of bays until the front row of bays is rotated horizontally to an open position that provides access to the inner row of bays. The front row of bays may be divided into two banks of drive bays. The left and right banks of bays may be opened separately by rotating them horizontally about hinges connecting each bank to the chassis. By opening in this manner, the inner bays can be administered safely and limiting the forces placed on the chassis and the rack.

Abstract: The present disclosure relates to a method for providing biomarker for early detection of Alzheimer's Disease (AD), and particularly to a method that is able to enhance the accuracy of predicting AD from Mild Cognitive Impairment (MCI) patients using the Hippocampus magnetic resonance imaging (MRI) scans and Mini-Mental State Examination (MMSE) data. The providing MRI images containing the anatomical structure of Hippocampus biomarker and MMSE data as a training data set; training a processor using the training data set, and the training comprising acts of receiving MRI images and MMSE data as a testing data set from a target; and classifying the test data by the trained processor to include aggregating predictions.

Abstract: A disclosed method for manufacturing a printed circuit board includes creating multiple conductive layers, each including conductive traces for carrying high-speed data signals, and a non-round plated through power via for delivering high current from a switched-mode power source to and between the conductive layers. Creating the power via may include drilling an opening through the multiple conductive layers, the perimeter of which has a flattened oval shape, and plating the walls of the opening to a predetermined plating thickness using a conductive material. The power via may have a lower resistivity than a combined resistivity of multiple round, plated through vias that, together with required spacing between them, have the same footprint as the power via. The space occupied by the power via may be less than a required footprint for multiple round, plated through vias whose combined resistivity equals the resistivity of the power via.

Abstract: A circuit comprising a first driver having an input, an output and a power input, and a first regulator having an input, an output coupled to the first driver, and an adjustment control configured to control a voltage of the first regulator. A second driver having an input, an output and a power input, and a second regulator having an input, an output coupled to the second driver, and an adjustment control configured to control a voltage of the second regulator. A first impedance coupled to the adjustment control of the first regulator and configured to selectably increase or decrease the voltage of the first regulator.

Abstract: A detecting device for detecting a stack light state is disclosed. The detecting device comprises a low-pass filter configured to perform low-pass filtering on an input signal to generate a first output voltage; and a logic circuit coupled to the low-pass filter and configured to determine the stack light state according to the first output voltage; wherein the input signal is a pulse width modulation signal and a voltage level of the first output voltage is between a highest voltage level and a lowest voltage level of the pulse width modulation signal.

Abstract: An electronic device is provided. The electronic device includes a plurality of expansion connector modules, a power supply path switch circuit, a system load and a controller. The power supply path switch circuit includes a plurality of input ends connected to output ends of expansion connector modules respectively. The system load is coupled to the power supply path switch circuit. The controller is coupled to the expansion connector module and the power supply path switch circuit. The controller determines whether a first power supply source is coupled to one of the expansion connector modules through the expansion connector modules. When the first power supply source is connected to the one of the expansion connector modules, the controller detects the power of the first power supply source via the expansion connector module connected to the first power supply source.

Abstract: A signal detecting device and a light-emitting apparatus using the same are provided. The signal detecting device includes an electromagnetic generator and a first switch. The electromagnetic generator includes a first receiving terminal and a second receiving terminal to receive an input signal from the first receiving terminal and the second receiving terminal and generate electromagnetic induction according to the input signal. A first terminal of the first switch is coupled to a first signal source. A second terminal of the first switch is coupled to an output terminal of the signal detecting device. The first switch determines whether the two terminals of the first switch are conducted according to the electromagnetic induction caused by the input signal.

Abstract: A buck voltage regulator control circuit for a single-input multi-output direct current power supply system, during a soft start phase of a first buck voltage regulator of the power supply system, the buck voltage regulator control circuit controls a first high side switch of the first buck voltage regulator to switch to a turned-on state from a turned-off state when a second high side switch of a second buck voltage regulator is in the turned-off state. Therefore, the first and second high side switches are not simultaneously switched to the turned-on state from the turned-off state to reduce inrush current.

Abstract: A voltage regulator circuit and a control method therefor are provided. A voltage regulator circuit includes a Switching Pulse Width Modulation (PWM) voltage regulation control integrated chip (IC), a first switch, a second switch, and a voltage detector. The Switching PWM voltage regulation control IC includes a low-dropout (LDO) regulator and a PWM voltage regulator. The voltage detector detects a predetermined voltage level range of the output voltage, and generates a power good signal of the output voltage. During the startup period, the first switch is turned on, and the input voltage supplies the power source for the LDO regulator to generate a driving source required by the Switching PWM voltage regulation IC. After the startup period, the power source of the LDO regulator are switched from the input voltage to the output voltage by the first switch and the second switch.

Abstract: An amplifying circuit for analog to digital converter with multi-stage conversion range is used for dividing an analog input voltage into multiple voltage ranges to perform signal amplification and attenuation according to multiple magnifications (e.g., amplify the analog input voltage with low voltage level, and attenuate the analog input voltage with high voltage level). The analog to digital converter performs analog to digital conversion to the analog input voltage with amplification or attenuation to generate a digital bit with amplification or attenuation, and then generates an output digital bit according to the digital bit and the magnification. As a result, the analog to digital converter is adaptive to the analog input voltage with high voltage level, and precision and quantization error of the analog input voltage with low voltage level can be maintained as well.

Abstract: An electronic device is provided. The electronic device includes a plurality of expansion connector modules, a power supply path switch circuit, a system load and a controller. The power supply path switch circuit includes a plurality of input ends connected to output ends of expansion connector modules respectively. The system load is coupled to the power supply path switch circuit. The controller is coupled to the expansion connector module and the power supply path switch circuit. The controller determines whether a first power supply source is coupled to one of the expansion connector modules through the expansion connector modules. When the first power supply source is connected to the one of the expansion connector modules, the controller detects the power of the first power supply source via the expansion connector module connected to the first power supply source.

Abstract: A voltage regulator circuit and a control method therefor are provided. A voltage regulator circuit includes a Switching Pulse Width Modulation (PWM) voltage regulation control integrated chip (IC), a first switch, a second switch, and a voltage detector. The Switching PWM voltage regulation control IC includes a low-dropout (LDO) regulator and a PWM voltage regulator. The voltage detector detects a predetermined voltage level range of the output voltage, and generates a power good signal of the output voltage. During the startup period, the first switch is turned on, and the input voltage supplies the power source for the LDO regulator to generate a driving source required by the Switching PWM voltage regulation IC. After the startup period, the power source of the LDO regulator are switched from the input voltage to the output voltage by the first switch and the second switch.

Abstract: A desk adjusting method for a desk is disclosed. The desk includes a desktop adjusting module, an input module and a sensing module. The adjusting method includes the input module receiving an identity information, or the sensing module generating a body information; and adjusting a height of the adjustable desk according to the identity information or the body information.

Abstract: A package structure for a photosensitive chip includes a substrate having an upper surface and a lower surface, and a frame layer having a first surface and a second surface. The frame layer is formed on the substrate by way of injection molding with the first surface contacting the upper surface. A cavity is formed between the substrate and the frame layer. The second surface is formed with a depression in which plural projections each having a suitable height are formed. The frame layer is formed directly on the substrate by way of injection molding. The package structure further includes a photosensitive chip arranged within the cavity, a plurality of wires for connecting the substrate to the photosensitive chip, and a transparent layer rested on the projections within the depression. Accordingly, the yield can be improved and the manufacturing processes can be facilitated.

Abstract: The image sensor structure of the invention is used for electrically connecting to a printed circuit board. The image sensor structure includes a substrate, a projecting layer, an image sensing chip, a plurality of wires, and a transparent layer. The substrate has a first surface and a second surface. The first surface is formed with signal output terminals for electrically connecting to the printed circuit board. The projecting layer has an upper surface and a lower surface. The lower surface is adhered to the second surface of the substrate to form a cavity with the substrate. The upper surface is formed with signal input terminals. The image sensing chip is placed within the cavity formed by the substrate and the projecting layer, and is adhered onto the second surface of the substrate. The plurality of wires each has a first terminal and a second terminal. The first terminals are electrically connected to the image sensing chip.

Abstract: A stacked structure of an image sensor includes a substrate, an integrated circuit, a package layer, an image sensing chip, and a transparent layer. The integrated circuit is formed on the substrate and electrically connected to the substrate. The package layer covers the integrated circuit. The image sensing chip is placed on the package layer to form the stacked structure with the integrated circuit and is electrically connected to the substrate. The transparent layer is arranged above the image sensing chip for the image sensing chip to receive image signals via the transparent layer. According to this structure, the image sensing chip and the integrated circuit can be integrally stacked easily.

Abstract: A stacked structure of an image sensor includes a substrate, an integrated circuit, a package layer, an image sensing chip, and a transparent layer. The integrated circuit is formed on the substrate and electrically connected to the substrate. The package layer covers the integrated circuit. The image sensing chip is placed on the package layer to form the stacked structure with the integrated circuit and is electrically connected to the substrate. The transparent layer is arranged above the image sensing chip for the image sensing chip to receive image signals via the transparent layer. According to this structure the image sensing chip and the integrated circuit can be integrally stacked easily.