Patents by Inventor Meng-Yi Sun

Meng-Yi Sun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • MOS devices with thinned gate spacers and methods of thinning the gate spacers
    Patent number: 10163727
    Abstract: A device includes a semiconductor substrate, a first Metal-Oxide-Semiconductor (MOS) device, and a second MOS device of a same conductivity as the first MOS device. The first MOS device includes a first gate stack over the semiconductor substrate, and a first stressor adjacent to the first gate stack and extending into the semiconductor substrate. The first stressor and the first gate stack have a first distance. The second MOS device includes a second gate stack over the semiconductor substrate, and a second stressor adjacent to the second gate stack and extending into the semiconductor substrate. The second stressor and the second gate stack have a second distance greater than the first distance.
    Type: Grant
    Filed: October 5, 2015
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jelin Wang, Ching-Chen Hao, Yi-Huang Wu, Meng Yi Sun
  • MOS Devices with Modulated Performance and Methods for Forming the Same
    Publication number: 20160027702
    Abstract: A device includes a semiconductor substrate, a first Metal-Oxide-Semiconductor (MOS) device, and a second MOS device of a same conductivity as the first MOS device. The first MOS device includes a first gate stack over the semiconductor substrate, and a first stressor adjacent to the first gate stack and extending into the semiconductor substrate. The first stressor and the first gate stack have a first distance. The second MOS device includes a second gate stack over the semiconductor substrate, and a second stressor adjacent to the second gate stack and extending into the semiconductor substrate. The second stressor and the second gate stack have a second distance greater than the first distance.
    Type: Application
    Filed: October 5, 2015
    Publication date: January 28, 2016
    Inventors: Jelin Wang, Ching-Chen Hao, Yi-Huang Wu, Meng Yi Sun
  • MOS devices with modulated performance and methods for forming the same
    Patent number: 9153690
    Abstract: A device includes a semiconductor substrate, a first Metal-Oxide-Semiconductor (MOS) device, and a second MOS device of a same conductivity as the first MOS device. The first MOS device includes a first gate stack over the semiconductor substrate, and a first stressor adjacent to the first gate stack and extending into the semiconductor substrate. The first stressor and the first gate stack have a first distance. The second MOS device includes a second gate stack over the semiconductor substrate, and a second stressor adjacent to the second gate stack and extending into the semiconductor substrate. The second stressor and the second gate stack have a second distance greater than the first distance.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: October 6, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jelin Wang, Ching-Chen Hao, Yi-Huang Wu, Meng Yi Sun
  • Structure and method for MOSFETS with high-K and metal gate structure
    Patent number: 8912610
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a semiconductor substrate; and a gate stack disposed on the semiconductor substrate. The gate stack includes a high k dielectric material layer, a capping layer disposed on the high k dielectric material layer, and a metal layer disposed on the capping layer. The capping layer and the high k dielectric material layer have a footing structure.
    Type: Grant
    Filed: April 3, 2012
    Date of Patent: December 16, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jr Jung Lin, Yun-Ju Sun, Shih-Hsun Chang, Chia-Jen Chen, Tomonari Yamamoto, Chih-Wei Kuo, Meng-Yi Sun, Kuo-Chiang Ting
  • MOS Devices with Modulated Performance and Methods for Forming the Same
    Publication number: 20130228826
    Abstract: A device includes a semiconductor substrate, a first Metal-Oxide-Semiconductor (MOS) device, and a second MOS device of a same conductivity as the first MOS device. The first MOS device includes a first gate stack over the semiconductor substrate, and a first stressor adjacent to the first gate stack and extending into the semiconductor substrate. The first stressor and the first gate stack have a first distance. The second MOS device includes a second gate stack over the semiconductor substrate, and a second stressor adjacent to the second gate stack and extending into the semiconductor substrate. The second stressor and the second gate stack have a second distance greater than the first distance.
    Type: Application
    Filed: March 1, 2012
    Publication date: September 5, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jelin Wang, Ching-Chen Hao, Yi-Huang Wu, Meng Yi Sun
  • Structure and Method for MOSFETS with High-K and Metal Gate Structure
    Publication number: 20130119487
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a semiconductor substrate; and a gate stack disposed on the semiconductor substrate. The gate stack includes a high k dielectric material layer, a capping layer disposed on the high k dielectric material layer, and a metal layer disposed on the capping layer. The capping layer and the high k dielectric material layer have a footing structure.
    Type: Application
    Filed: April 3, 2012
    Publication date: May 16, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jr Jung Lin, Yun-Ju Sun, Shih-Hsun Chang, Chia-Jen Chen, Tomonari Yamamoto, Chih-Wei Kuo, Meng-Yi Sun, Kuo-Chiang Ting