Patents by Inventor MENG YU HUANG
MENG YU HUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12010833Abstract: A memory device includes a first memory cell having a first polysilicon line associated with a first read word line and intersecting a first active region and a second active region, and a second polysilicon line and a first CPODE associated with a first program word line, the second polysilicon line intersecting the first active region and the first CPODE intersecting the second active region. The memory device also includes a second memory cell adjacent to the first memory cell, the second memory cell having a third polysilicon line associated with a second read word line and intersecting the first active region and the second active region, and a fourth polysilicon line and a second CPODE associated with a second program word line, the fourth polysilicon line intersecting the second active region and the second CPODE intersecting the first active region to form a cross-arrangement of CPODE.Type: GrantFiled: July 17, 2023Date of Patent: June 11, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Meng-Sheng Chang, Chia-En Huang, Shao-Yu Chou, Yih Wang
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Publication number: 20240186323Abstract: An integrated circuit includes a plurality of transistors and a vertical local interconnection. The transistors include a plurality of gate components, a plurality of front-side source/drain epitaxies and a plurality of back-side source/drain epitaxies, wherein the front-side source/drain epitaxies are closer to a front-side side of the integrated circuit than the back-side source/drain epitaxies. The vertical local interconnection connects a first connected-one of the front-side source/drain epitaxies with a second connected-one of the back-side source/drain epitaxies. A covered-one of the gate components is located between the first connected-one and the second connected-one, the covered-one comprises an front-side portion, a back-side portion and a covered portion connecting the front-side portion with the back-side portion, and the vertical local interconnection crosses the covered portion and exposes the front-side portion and the back-side portion.Type: ApplicationFiled: January 20, 2023Publication date: June 6, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Meng-Yu LIN, Chun-Fu CHENG, Hsiang-Hung HUANG
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Publication number: 20240176093Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.Type: ApplicationFiled: February 5, 2024Publication date: May 30, 2024Inventors: Chao-Chang HU, Chih-Wei WENG, Chia-Che WU, Chien-Yu KAO, Hsiao-Hsin HU, He-Ling CHANG, Chao-Hsi WANG, Chen-Hsien FAN, Che-Wei CHANG, Mao-Gen JIAN, Sung-Mao TSAI, Wei-Jhe SHEN, Yung-Ping YANG, Sin-Hong LIN, Tzu-Yu CHANG, Sin-Jhong SONG, Shang-Yu HSU, Meng-Ting LIN, Shih-Wei HUNG, Yu-Huai LIAO, Mao-Kuo HSU, Hsueh-Ju LU, Ching-Chieh HUANG, Chih-Wen CHIANG, Yu-Chiao LO, Ying-Jen WANG, Shu-Shan CHEN, Che-Hsiang CHIU
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Publication number: 20240134250Abstract: The present disclosure provides a base assembly of voice coil motor and a voice coil motor. The base assembly includes a base body having a first elastic piece connecting area, a lower elastic piece disposed on the first elastic piece connecting area, and a first terminal disposed in the base body. The first terminal has: a first conductive part disposed in the base body; a first terminal connecting part disposed on one side of the first conductive part and extending toward a direction away from the first conductive part, wherein a part of the first terminal connecting part protrudes from the first elastic piece connecting area and is contacted and connected with the lower elastic piece; and an engaging part disposed on one side of the first terminal connecting part and extending toward a direction away from the first terminal connecting part.Type: ApplicationFiled: December 22, 2023Publication date: April 25, 2024Applicant: Lanto Electronic LimitedInventors: Wen-Yen HUANG, Fu-Yuan WU, Shang-Yu HSU, Meng-Ting LIN, BingBing MA, Jie DU
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Patent number: 11951637Abstract: A calibration apparatus includes a processor, an alignment device, and an arm. The alignment device captures images in a three-dimensional space, and a tool is arranged on a flange of the arm. The processor records a first matrix of transformation between an end-effector coordinate-system and a robot coordinate-system, and performs a tool calibration procedure according to the images captured by the alignment device for obtaining a second matrix of transformation between a tool coordinate-system and the end-effector coordinate-system. The processor calculates relative position of a tool center point of the tool in the robot coordinate-system based on the first and second matrixes, and controls the TCP to move in the three-dimensional space for performing a positioning procedure so as to regard points in an alignment device coordinate-system as points of the TCP, and calculates the relative positions of points in the alignment device coordinate-system and in the robot coordinate-system.Type: GrantFiled: June 4, 2021Date of Patent: April 9, 2024Assignee: DELTA ELECTRONICS, INC.Inventors: Cheng-Hao Huang, Shi-Yu Wang, Po-Chiao Huang, Han-Ching Lin, Meng-Zong Li
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Publication number: 20240111116Abstract: An anti-twist structure of voice coil motor includes a base, a lens housing, an elastic sheet, a magnet, and a yoke member. The lens housing has a margin wall, and the margin wall has a first protrusion and a contact portion. The elastic sheet has a hollowed slot, and the first protrusion pass through the hollowed slot, so that the elastic sheet is disposed on a portion of the margin wall and on the contact portion. The yoke member has an upper wall and a side wall. The side wall is disposed at one side of the upper wall and the side wall extends outward in a direction not parallel to the upper wall. The yoke member surrounds the lens housing, the elastic sheet, and the magnet. The lens housing has a deflectable angle relative to a horizontal reference line.Type: ApplicationFiled: December 7, 2023Publication date: April 4, 2024Applicant: Lanto Electronic LimitedInventors: Wen-Yen Huang, Meng-Ting Lin, Fu-Yuan Wu, Shang-Yu Hsu, Bing-Bing Ma, Jie Du
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Publication number: 20240103244Abstract: An anti-twist structure of voice coil motor includes a base, a lens housing, an elastic sheet, a magnet, and a yoke member. The lens housing has a margin wall, and the margin wall has a first protrusion and a contact portion. The elastic sheet has a hollowed slot, and the first protrusion pass through the hollowed slot, so that the elastic sheet is disposed on a portion of the margin wall and on the contact portion. The yoke member has an upper wall and a side wall. The side wall is disposed at one side of the upper wall and the side wall extends outward in a direction not parallel to the upper wall. The yoke member surrounds the lens housing, the elastic sheet, and the magnet. The lens housing has a deflectable angle relative to a horizontal reference line.Type: ApplicationFiled: December 7, 2023Publication date: March 28, 2024Applicant: Lanto Electronic LimitedInventors: Wen-Yen Huang, Meng-Ting Lin, Fu-Yuan Wu, Shang-Yu Hsu, Bing-Bing Ma, Jie Du
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Patent number: 11939664Abstract: A semiconductor process system includes a process chamber. The process chamber includes a wafer support configured to support a wafer. The system includes a bell jar configured to be positioned over the wafer during a semiconductor process. The interior surface of the bell jar is coated with a rough coating. The rough coating can include zirconium.Type: GrantFiled: August 30, 2021Date of Patent: March 26, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Meng-Chun Hsieh, Tsung-Yu Tsai, Hsing-Yuan Huang, Chih-Chang Wu, Szu-Hua Wu, Chin-Szu Lee
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Patent number: 11934027Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.Type: GrantFiled: June 21, 2022Date of Patent: March 19, 2024Assignee: TDK TAIWAN CORP.Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
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Publication number: 20240073531Abstract: An automatic target image acquisition and calibration system for application in a defect inspection system is disclosed. During the defect inspection system working normally, the automatic target image acquisition and calibration system is configured to find a recognition structure from an article under inspection, and then determines a relative position and a relative 3D coordinate if the article. Therefore, a robotic arm is controlled to carry a camera to precisely face each of a plurality of inspected surfaces of the article, such that a plurality of article images are acquired by the camera. It is worth explaining that, during the defect inspection of the article, there is no need to modulate an image acquiring height and an image acquiring angle of the camera and an illumination of a light source.Type: ApplicationFiled: August 17, 2023Publication date: February 29, 2024Inventors: FENG-TSO SUN, YI-TING YEH, FENG-YU SUN, JYUN-TANG HUANG, RONG-HUA CHANG, YI-HSIANG TIEN, MENG-TSE SHEN
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Publication number: 20240072136Abstract: A semiconductor structure includes a first transistor, a second transistor, a metal rail, and a first source/drain contact and a second source/drain contact. The first transistor has a gate structure, a first source/drain feature, and a second source/drain feature. The first source/drain feature and the second source/drain feature are on opposite sides of the gate structure. The second transistor has the gate structure, a third source/drain feature directly over the first source/drain feature, and a fourth source/drain feature directly over the second source/drain feature. The metal rail extends in an X-direction and adjacent to the gate structure in a Y-direction. The first source/drain contact and the second source/drain contact each has an L-shape in a Y-Z cross-sectional view. The first source/drain contact electrically connects the first source/drain feature to the metal rail. The second source/drain contact electrically connects the fourth source/drain feature to the metal rail.Type: ApplicationFiled: August 26, 2022Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Meng-Yu LIN, Chun-Fu CHENG, Hsiang-Hung HUANG
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Publication number: 20240072115Abstract: A device includes: a complementary transistor including: a first transistor having a first source/drain region and a second source/drain region; and a second transistor stacked on the first transistor, and having a third source/drain region and a fourth source/drain region, the third source/drain region overlapping the first source/drain region, the fourth source/drain region overlapping the second source/drain region. The device further includes: a first source/drain contact electrically coupled to the third source/drain region; a second source/drain contact electrically coupled to the second source/drain region; a gate isolation structure adjacent the first and second transistors; and an interconnect structure electrically coupled to the first source/drain contact and the second source/drain contact.Type: ApplicationFiled: February 13, 2023Publication date: February 29, 2024Inventors: Wei-Xiang You, Wei-De Ho, Hsin Yang Hung, Meng-Yu Lin, Hsiang-Hung Huang, Chun-Fu Cheng, Kuan-Kan Hu, Szu-Hua Chen, Ting-Yun Wu, Wei-Cheng Tzeng, Wei-Cheng Lin, Cheng-Yin Wang, Jui-Chien Huang, Szuya Liao
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Publication number: 20240071537Abstract: A multi-fuse memory cell is disclosed. The circuit includes: a first fuse element electrically coupled to a first transistor, a gate of the first transistor is electrically coupled to a first selection signal; a second fuse element electrically coupled to a second transistor, a gate of the second transistor is electrically coupled to a second selection signal, both the first transistor and the second transistor are grounded; and a programming transistor electrically coupled to the first fuse element and the second fuse element, wherein a gate of the programming transistor is electrically coupled to a programming signal.Type: ApplicationFiled: November 7, 2023Publication date: February 29, 2024Inventors: Meng-Sheng Chang, Chia-En Huang, Shao-Yu Chou, Yih Wang
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Publication number: 20090206870Abstract: A method for analyzing Integrated circuit (IC) devices is provided.Type: ApplicationFiled: August 8, 2008Publication date: August 20, 2009Inventors: MENG YU HUANG, Tsai Li Lee, Chin Tsair Chen, Ming Hsieh Tsai