Abstract: Power control systems are provided including a digital controller configured to control gating mechanism for power switches responsive to an input from a power conversion circuit. The digital controller includes a conversion circuit, a modulation circuit and a gating control circuit. The system further includes an analog circuit comprising a filter, a current limiter and a compare circuit. The current limiter is configured to control a magnitude of a current pulled through a power convertor during a device switching operation.

Abstract: An integrated circuit is provided with an MCU, which is configured to generate a PWM control signal that is free of switching pattern information therein. A current-estimating gate driver is provided, which is responsive to the PWM signal. This gate driver is configured to drive first and second gate terminals of first and second parallel switching devices (within a hybrid switch) with gate signals that establish a second switching pattern within the hybrid switch. These gate driving operations are performed in response to measuring a first voltage associated with a terminal of the hybrid switch when being driven by gate signals that establish a first switching pattern within the hybrid switch that is different from the second switching pattern. The duty cycles of the gate signals associated with the second switching pattern are unequal and the duty cycles of the gate signals associated with the first switching pattern are unequal.

Abstract: An integrated circuit is provided with an MCU, which is configured to generate a PWM control signal that is free of switching pattern information therein. A current-estimating gate driver is provided, which is responsive to the PWM signal. This gate driver is configured to drive first and second gate terminals of first and second parallel switching devices (within a hybrid switch) with gate signals that establish a second switching pattern within the hybrid switch. These gate driving operations are performed in response to measuring a first voltage associated with a terminal of the hybrid switch when being driven by gate signals that establish a first switching pattern within the hybrid switch that is different from the second switching pattern. The duty cycles of the gate signals associated with the second switching pattern are unequal and the duty cycles of the gate signals associated with the first switching pattern are unequal.

Abstract: An integrated circuit is provided with an MCU, which is configured to generate a PWM control signal that is free of switching pattern information therein. A current-estimating gate driver is provided, which is responsive to the PWM signal. This gate driver is configured to drive first and second gate terminals of first and second parallel switching devices (within a hybrid switch) with gate signals that establish a second switching pattern within the hybrid switch. These gate driving operations are performed in response to measuring a first voltage associated with a terminal of the hybrid switch when being driven by gate signals that establish a first switching pattern within the hybrid switch that is different from the second switching pattern. The duty cycles of the gate signals associated with the second switching pattern are unequal and the duty cycles of the gate signals associated with the first switching pattern are unequal.

Abstract: Power control systems are provided including a digital controller configured to control gating mechanism for power switches responsive to an input from a power conversion circuit. The digital controller includes a conversion circuit, a modulation circuit and a gating control circuit. The system further includes an analog circuit comprising a filter, a current limiter and a compare circuit. The current limiter is configured to control a magnitude of a current pulled through a power convertor during a device switching operation.

Abstract: An integrated circuit includes a hybrid switch having first and second switching devices of different type therein. A control circuit is provided, which is configured to drive the first and second devices with respective first and second control signals having first and second unequal duty cycles, respectively, when the first and second devices are supporting a forward current in a first current range. The control circuit is further configured to drive the first and second devices with respective third and fourth control signals having third and fourth unequal duty cycles, respectively, when the first and second devices are supporting a forward current in a second current range outside the first current range. The first duty cycle may be greater than the second duty cycle and the third duty cycle may be less than the fourth duty cycle.

Abstract: An integrated circuit is provided with an MCU, which is configured to generate a PWM control signal that is free of switching pattern information therein. A current-estimating gate driver is provided, which is responsive to the PWM signal. This gate driver is configured to drive first and second gate terminals of first and second parallel switching devices (within a hybrid switch) with gate signals that establish a second switching pattern within the hybrid switch. These gate driving operations are performed in response to measuring a first voltage associated with a terminal of the hybrid switch when being driven by gate signals that establish a first switching pattern within the hybrid switch that is different from the second switching pattern. The duty cycles of the gate signals associated with the second switching pattern are unequal and the duty cycles of the gate signals associated with the first switching pattern are unequal.

Abstract: An integrated circuit includes a hybrid switch having first and second switching devices of different type therein. A control circuit is provided, which is configured to drive the first and second devices with respective first and second control signals having first and second unequal duty cycles, respectively, when the first and second devices are supporting a forward current in a first current range. The control circuit is further configured to drive the first and second devices with respective third and fourth control signals having third and fourth unequal duty cycles, respectively, when the first and second devices are supporting a forward current in a second current range outside the first current range. The first duty cycle may be greater than the second duty cycle and the third duty cycle may be less than the fourth duty cycle.