Abstract: The present invention is directed to bifunctional small molecules which contain a circulating protein binding moiety (CPBM) linked through a linker group to a cellular receptor binding moiety (CRBM) which is a membrane receptor of degrading cell such as a hepatocyte or other degrading cell. In embodiments, the (CRBM) is a moiety which binds to asialoglycoprotein receptor (an asialoglycoprotein receptor binding moiety, or ASGPRBM) of a hepatocyte. In additional embodiments, the (CRBM) is a moiety which binds to a receptor of other cells which can degrade proteins, such as a LRP1, LDLR, Fc?RI, FcRN, Transferrin or Macrophage Scavenger receptor. Pharmaceutical compositions based upon these bifunctional small molecules represent an additional aspect of the present invention. These compounds and/or compositions may be used to treat disease states and conditions by removing circulating proteins through degradation in the hepatocytes or macrophages of a patient or subject in need of therapy.

Abstract: Described herein are compositions and methods for detecting the presence of ubiquitination in a sample. The compositions include synthetic peptides containing a high affinity ubiquitin binding domain and an additional peptide sequence that can be coupled to materials such as resins and dyes.

Abstract: A crystal oscillator and a method are provided for adjusting an oscillation frequency. The crystal oscillator includes: a first oscillator circuit, a frequency control circuit and a crystal; where the first oscillator circuit is configured to output a first drive signal having a first oscillation frequency to drive the crystal, and the frequency control circuit is configured to determine a frequency control amount according to a feature of an electrical signal flowing through the crystal under driving of the first drive signal, and adjust the first oscillation frequency according to the frequency control amount. When the technical solutions are applied to scenarios where the crystal oscillator is enabled to quickly en-oscillate, a natural en-oscillation cycle of the crystal oscillator may be shortened, and the en-oscillation speed is increased.

Abstract: Nanoscale multiple emulsions, nanoparticles resulting therefrom and methods of making and using thereof are described. The nanoscale multiple emulsions are typically double nanoemulsions, such as oil-in-water-in-oil (O1/W/O2) nanoemulsions, in which nanodroplets of the first oil (O1) phase are suspended in the aqueous (W) phase and together are dispersed in the second oil (O2) phase. The double nanoemulsions are stable with high encapsulation efficiency allowing templating to form multiphase nanoparticles. The multiphase nanoparticles include nanodroplets of O1 phase dispersed in a continuous matrix that can be a liquid, a gel, or a solid at room temperature and pressure. Methods of making the double nanoemulsions include high-energy forces and serial nanoemulsifications.

Abstract: The present disclosure discloses a quick-start clock system, which includes: a digital subsidiary circuit configured to output a digital control value; a phase-locked loop including a programmable voltage-controlled oscillator circuit and a frequency dividing circuit connected to each other and both connected to the digital subsidiary circuit, the programmable voltage-controlled oscillator circuit obtains the digital control value output, and output a clock signal according to the digital control value, the frequency dividing circuit performs a frequency dividing operation on the clock signal; and a crystal oscillator circuit connected to the phase-locked loop, which includes a crystal and an oscillation injecting circuit connected to the crystal, the oscillation injecting circuit converts the clock signal performed with the frequency dividing operation to a co-frequency fully differential signal, and inject the co-frequency fully differential signal into the crystal.

Abstract: A data interface is disclosed, which includes an electrostatic discharge circuit, and a charge transmitting circuit connected to a binding wire through the electrostatic discharge circuit; the charge transmitting circuit includes a first capacitor, the charge transmitting circuit transfers charges in the first capacitor to a parasitic capacitor of the electrostatic discharge circuit and a parasitic capacitor of the binding wire, to generate a first voltage signal and output the first voltage signal through the binding wire. According to the data interface, charges in a charging capacitor and a parasitic capacitor are redistributed, which could not only reduce a power consumption loss caused by a parasitic capacitor in a communication channel but also effectively reduce time delay. In addition, the use of dual-wire communication is avoided by using single-wire communication, and the manufacturing costs are reduced relative to low-voltage differential signaling (LVDS).

Abstract: Provided is a crystal oscillator, including: a crystal; an oscillating circuit including a first oscillating transistor and a second oscillating transistor, where the first oscillating transistor and the second oscillating transistor are configured to provide transconductance for starting oscillation and maintaining oscillation of the crystal; a first driving circuit configured to generate a stable reference current; and a second driving circuit, configured to supply an operating voltage to the oscillating circuit and make an operating current of the first oscillating transistor and the second oscillating transistor be a stable current according to the reference current, where the operating voltage is used to control the first oscillating transistor and the second oscillating transistor to operate in a sub-threshold region.

Abstract: Techniques are described for implementing diodes with low threshold voltages and high breakdown voltages. Some embodiments further implement diode devices with programmable threshold voltages. For example, embodiments can couples a native device with one or more low-threshold, diode-connected devices. The coupling is such that the low-threshold device provides a low threshold voltage while being protected from breakdown by the native device, effectively manifesting as a high breakdown voltage. Some implementations include selectable branches by which the native device is programmably coupled with any of multiple low-threshold, diode-connected devices.

Abstract: An I-V conversion module includes: a current output type sensor, a pre-integral circuit, a charge transfer auxiliary circuit, and an I-V transformation circuit including an inverting amplifier. The current output type sensor is connected to an input end of the I-V transformation circuit through the pre-integral circuit. The charge transfer auxiliary circuit connects in parallel with the inverting amplifier. When both the pre-integral circuit and the charge transfer auxiliary circuit are open circuits, the pre-integral circuit pre-integrates the induction current output by the current output type sensor to store pre-integral charges. When both pre-integral circuit and the charge transfer auxiliary circuit are closed circuits, the pre-integral charges are transferred to the I-V transformation circuit. In these embodiments, both the time for establishing the I-V conversion module and power consumption can be reduced.

Abstract: A fingerprint sensor and a terminal device are provided, including: a first drive circuit, configured to generate a periodic driving signal according to a periodic first input signal, periods of the first input signal and the driving signal being both a predetermined period; each second drive circuit corresponding to a column of voltage integrators respectively, the each second drive circuit being configured to generate a column select signal according to a second input signal, the column select signal being used for controlling an operating state of a corresponding column of voltage integrators; and each of N columns of voltage integrators configured to receive the driving signal and the column select signal generated by a corresponding second drive circuit, and charge or integrate a fingerprint capacitor according to the driving signal and the column select signal.

Abstract: The present disclosure discloses a quick-start clock system, which includes: a digital subsidiary circuit configured to output a digital control value; a phase-locked loop including a programmable voltage-controlled oscillator circuit and a frequency dividing circuit connected to each other and both connected to the digital subsidiary circuit, the programmable voltage-controlled oscillator circuit obtains the digital control value output, and output a clock signal according to the digital control value, the frequency dividing circuit performs a frequency dividing operation on the clock signal; and a crystal oscillator circuit connected to the phase-locked loop, which includes a crystal and an oscillation injecting circuit connected to the crystal, the oscillation injecting circuit converts the clock signal performed with the frequency dividing operation to a co-frequency fully differential signal, and inject the co-frequency fully differential signal into the crystal.

Abstract: A current sample-and-hold circuit and a sensor, are provided. The current sample-and-hold circuit is used for offsetting a background photocurrent of a photodiode, and includes a capacitor and a first transconductance amplifier which has adjustable transconductance and outputs a sampled current to the photodiode to offset the background photocurrent of the photodiode. One end of the capacitor is connected with a power supply, the other end of the capacitor is connected with one end of the first transconductance amplifier; and the other end of the first transconductance amplifier is connected with the photodiode to output the sampled current to the photodiode. When the background photocurrent of the photodiode is increased, a change of a voltage of the capacitor within a large range can be avoided by increasing the transconductance of the first transconductance amplifier, so that the current sample-and-hold circuit can offset a larger background photocurrent.

Abstract: An amplitude limiting oscillation circuit is disclosed. The amplitude limiting oscillation circuit includes: an oscillation circuit, configured to generate an oscillation signal; a pulse width modulation circuit, configured to generate a pulse width modulation signal according to an amplitude of the oscillation signal; a low pass filtering circuit, configured to convert the pulse width modulation signal into a direct current control voltage signal, where the direct current control voltage signal is configured to control a voltage controlled resistance circuit; and the voltage controlled resistance circuit, configured to change a resistance value of the voltage controlled resistance circuit according to under the direct current control voltage signal, to control the amplitude of the oscillation signal. The amplitude limiting oscillation circuit, may improve performance of the amplitude limiting oscillation circuit.

Abstract: Provided is a reverse current switch. The reverse current switch includes: a comparison unit including a first input end, a second input end, and a first output end; and a switch resistance unit, where a first end of the switch resistance unit is connected to the first input end, a second end of the switch resistance unit is connected to the second input end, and a third end of the switch resistance unit is connected to the output end of the comparison unit, and the switch resistance unit is controlled by a voltage of the first output end. This reverse current switch has a simple structure and can implement working under low voltage conditions.

Abstract: A data interface is disclosed, which includes an electrostatic discharge circuit, and a charge transmitting circuit connected to a binding wire through the electrostatic discharge circuit; the charge transmitting circuit includes a first capacitor, the charge transmitting circuit transfers charges in the first capacitor to a parasitic capacitor of the electrostatic discharge circuit and a parasitic capacitor of the binding wire, to generate a first voltage signal and output the first voltage signal through the binding wire. According to the data interface, charges in a charging capacitor and a parasitic capacitor are redistributed, which could not only reduce a power consumption loss caused by a parasitic capacitor in a communication channel but also effectively reduce time delay. In addition, the use of dual-wire communication is avoided by using single-wire communication, and the manufacturing costs are reduced relative to low-voltage differential signaling (LVDS).

Abstract: A crystal oscillator and a method are provided for adjusting an oscillation frequency. The crystal oscillator includes: a first oscillator circuit, a frequency control circuit and a crystal; where the first oscillator circuit is configured to output a first drive signal having a first oscillation frequency to drive the crystal, and the frequency control circuit is configured to determine a frequency control amount according to a feature of an electrical signal flowing through the crystal under driving of the first drive signal, and adjust the first oscillation frequency according to the frequency control amount. When the technical solutions are applied to scenarios where the crystal oscillator is enabled to quickly en-oscillate, a natural en-oscillation cycle of the crystal oscillator may be shortened, and the en-oscillation speed is increased.

Abstract: Provided is a crystal oscillator, including: a crystal; an oscillating circuit including a first oscillating transistor and a second oscillating transistor, where the first oscillating transistor and the second oscillating transistor are configured to provide transconductance for starting oscillation and maintaining oscillation of the crystal; a first driving circuit configured to generate a stable reference current; and a second driving circuit, configured to supply an operating voltage to the oscillating circuit and make an operating current of the first oscillating transistor and the second oscillating transistor be a stable current according to the reference current, where the operating voltage is used to control the first oscillating transistor and the second oscillating transistor to operate in a sub-threshold region.

Abstract: A correlated double sampling integrating circuit is provided. The circuit includes: a sampling and holding module, an energy storage unit and a feedback module. The sampling and holding module is configured to perform sampling and holding for different input signals. The energy storage unit is configured to store charges corresponding to the input signals upon the sampling and holding to generate node signals, and the feedback module is configured to form a negative feedback loop with the energy storage unit to control node signals at an integrating stage to keep consistent with node signals at a resetting stage and prevent output jump of the correlated double sampling integrating circuit. The correlated double sampling integrating circuit reduces noise, and prevents or weakens output jump of the correlated double sampling integrating circuit caused by the increase of the count of integrations.

Abstract: Embodiments of the present disclosure provide a capacitive fingerprint sensor. The capacitive fingerprint sensor includes: a first electrode plate layer, a second electrode plate layer and a third electrode plate layer that are sequentially arranged. The first electrode plate layer forms a fingerprint capacitor with a finger, at least one fourth electrode plate layer is arranged between the first electrode plate layer and the second electrode plate layer, a first parasitic capacitor is formed between the first electrode plate layer and the fourth electrode plate layer, and a second parasitic capacitor is formed between the second electrode plate layer and the fourth electrode plate layer; and the capacitive fingerprint sensor further comprises an integrator having an integrating capacitor, and the integrating capacitor is formed between the second electrode plate layer and the third electrode plate layer.

Abstract: Embodiments of the present disclosure hereinafter provide a capacitive fingerprint sensor. The capacitive fingerprint sensor includes: an integrator, a trigger and a base cancelling circuit; where the integrator is configured to store charges from a fingerprint capacitor to generate an output signal and transfer the output signal to the trigger, the trigger is configured to trigger the base cancelling circuit to generate a base cancelling signal and output the base cancelling signal to the integrator if the output signal exceeds a predetermined threshold, and the base cancelling signal is used to adjust the output signal of the integrator to fall within the predetermined threshold. In this way, the integrator is prevented from simply coming to saturation, and thus a dynamic range of the integrator is increased.