Patents by Inventor Mengyuan HUA

Mengyuan HUA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • P-TYPE GATE HEMT DEVICE
    Publication number: 20230411504
    Abstract: A P-type gate HEMT device includes a substrate, a buffer layer, a channel layer, and a barrier layer sequentially arranged from bottom to top. A first P-type material layer is arranged on the barrier layer. A first source and a first drain are respectively arranged on two sides of the first P-type material layer. A first conductive layer is arranged on the first P-type material layer. A second P-type material layer is connected to the first P-type material layer. A second conductive layer is connected to the second P-type material layer. A third conductive layer is connected to the second P-type material layer. The first P-type material layer, the first source, the first drain, and the first conductive layer form a normally-off N-channel transistor. The second P-type material layer, the second conductive layer, and the third conductive layer form a normally-on P-channel transistor.
    Type: Application
    Filed: August 18, 2021
    Publication date: December 21, 2023
    Applicant: SOUTHERN UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Mengyuan HUA, Junting CHEN
  • Metal-insulator-semiconductor transistors with gate-dielectric/semiconductor interfacial protection layer
    Patent number: 11705511
    Abstract: Structures, devices and methods are provided for forming an interface protection layer (204) adjacent to a fully or partially recessed gate structure (202) of a group III nitride, a metal-insulator-semiconductor high-electron-mobility transistor (MIS-HEMT) device or a metal-insulator-semiconductor field-effect transistor (MIS-FET) device, and forming agate dielectric (114) disposed the interface protection layer (204).
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: July 18, 2023
    Assignee: THE HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Jing Chen, Mengyuan Hua
  • METAL-INSULATOR-SEMICONDUCTOR TRANSISTORS WITH GATE-DIELECTRIC/SEMICONDUCTOR INTERFACIAL PROTECTION LAYER
    Publication number: 20210351287
    Abstract: Structures, devices and methods are provided for forming an interface protection layer (204) adjacent to a fully or partially recessed gate structure (202) of a group III nitride, a metal-insulator-semiconductor high-electron-mobility transistor (MIS-HEMT) device or a metal-insulator-semiconductor field-effect transistor (MIS-FET) device, and forming agate dielectric (114) disposed the interface protection layer (204).
    Type: Application
    Filed: August 16, 2017
    Publication date: November 11, 2021
    Inventors: Jing CHEN, Mengyuan HUA