Abstract: A processing device comprises an instruction memory 120 for storing virtual machine instructions, such as Java byte codes. A processor 112 of the processing device comprises a predetermined microcontroller core 114 for executing native instructions from a predetermined set of microcontroller specific instructions. The native instructions differ from the virtual machine instructions. The processor 112 is of a type which may request re-feeding of a plurality of native instructions. For instance, the processor 112 may have a pipeline and/or instruction cache which after an interrupt need to be re-filled. The processing device comprises a pre-processor 130 with a converter 132 for converting at least one virtual machine instruction, fetched from the instruction memory, into at least one native instruction.

Abstract: An array boundary checking method is disclosed for providing hardware based array boundary checking in a Java environment. During the first machine cycle of a current array access command, an array reference value is loaded into a system-data address controller and an array boundary checker. Next, during the second machine cycle of the current array access command, an array index value is written to the system-data address controller and the array boundary checker. Also during the second machine cycle of the current array access command, a maximum array index value is read from the Java array and written to the array boundary checker. The array boundary checker utilizes these values to determine the validity of the current array access command. Finally, during the third machine cycle an array value is accessed in memory. In the present invention the array value is only accessed when the current array access command is valid.

Abstract: A processing device comprises an instruction memory 120 for storing virtual machine instructions, such as Java byte codes. A processor 112 of the processing device comprises a predetermined microcontroller core 114 for executing native instructions from a predetermined set of microcontroller specific instructions. The native instructions differ from the virtual machine instructions. The processor 112 is of a type which may request re-feeding of a plurality of native instructions. For instance, the processor 112 may have a pipeline and/or instruction cache which after an interrupt need to be re-filled.

Abstract: A processing device is disclosed that includes an instruction memory for storing virtual machine instructions, such as Java byte codes. A processor of the processing device includes a predetermined microcontroller core for executing native instructions from a predetermined set of microcontroller specific instructions. The native instructions differ from the virtual machine instructions. The processor may request re-feeding of a plurality of native instructions. For instance, the processor may have a pipeline and/or instruction cache which after an interrupt needs to be re-filled. The processing device includes a pre-processor with a converter for converting at least one virtual machine instruction, fetched from the instruction memory, into at least one native instruction. A feeding means of the pre-processor feeds native instructions to the microcontroller core and re-feeds native instructions in response to the processor requesting re-feeding of a number of native instructions.

Abstract: A preprocessor is functionally inserted between a memory and a processor core. The preprocessor fetches virtual machine instructions, like Java instructions, from the memory and from them it generates native instructions which are supplied to the processor core. In response to a special virtual instruction the preprocessor supplies a native jump to subroutine to the processor core, monitors when the processor core returns from that subroutine and then resumes supplying generated native instructions. The invention also provides for a processor which has a special instruction which calls a subroutine and causes the processor to convert a call context for virtual machine instructions to a call context for a high level language subroutine before making the call.