Patents by Inventor Merle A. Schultz

Merle A. Schultz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Game Animal Transportation and securing device
    Publication number: 20110031288
    Abstract: A tether is secured to the game animal animal's head via a snaring loop (3a) at the base of the skull with a constraining loop around the animal's snout. Said tether is attached to the rear base of a harness (1a,b,c,d/2a,b,c,d,e,) which is secured to the hunter's upper body. The harness will accommodate a variety of wearer sizes through the use of an adjustable strap (1f). The distance between the dragger and the object being dragged can be adjusted by lengthening or shortening the drag strap using a friction buckle affixed to the base of the harness (2h).
    Type: Application
    Filed: August 4, 2009
    Publication date: February 10, 2011
    Inventor: Merle Schultz
  • Processor architecture providing for speculative execution of instructions with multiple predictive branching and handling of trap conditions
    Patent number: 5987588
    Abstract: A processor architecture is described which operates with improved computational efficiency using instruction fetching functions that are decoupled from instruction execution functions by a dynamic register file. The instruction fetching function operates in free-running mode which does not stop if a fetched instruction cannot be executed due to data being unavailable or due to other instruction dependencies. Branch instructions are taken in a predicted direction and the results of execution of all instructions are provisionally stored pending validation or invalidation on the basis of the dependencies becoming available later.
    Type: Grant
    Filed: August 28, 1998
    Date of Patent: November 16, 1999
    Assignee: Hyundai Electronics America, Inc.
    Inventors: Valeri Popescu, Merle A. Schultz, Gary A. Gibson, John E. Spracklen, Bruce D. Lightner
  • Processor architecture providing speculative, out of order execution of instructions and trap handling
    Patent number: 5832293
    Abstract: A processor architecture is described which operates with improved computational efficiency using instruction fetching functions that are decoupled from instruction execution functions by a dynamic register file. The instruction fetching function operates in free-running mode which does not stop if a fetched instruction cannot be executed due to data being unavailable or due to other instruction dependencies. Branch instructions are taken in a predicted direction and the results of execution of all instructions are provisionally stored pending validation or invalidation on the basis of the dependencies becoming available later.
    Type: Grant
    Filed: August 15, 1997
    Date of Patent: November 3, 1998
    Assignee: Hyundai Electronics America, Inc.
    Inventors: Valeri Popescu, Merle A. Schultz, Gary A. Gibson, John E. Spracklen, Bruce D. Lightner
  • Processor architecture supporting speculative, out of order execution of instructions including multiple speculative branching
    Patent number: 5797025
    Abstract: A processor architecture is described which operates with improved computational efficiency using instruction fetching functions that are decoupled from instruction execution functions by a dynamic register file. The instruction fetching function operates in free-running mode which does not stop if a fetched instruction cannot be executed due to data being unavailable or due to other instruction dependencies. Branch instructions are taken in a predicted direction and the results of execution of all instructions are provisionally stored pending validation or invalidation on the basis of the dependencies becoming available later.
    Type: Grant
    Filed: November 14, 1996
    Date of Patent: August 18, 1998
    Assignee: Hyundai Electronics America, Inc.
    Inventors: Valeri Popescu, Merle A. Schultz, Gary A. Gibson, John E. Spracklen, Bruce D. Lightner
  • Processor architecture providing speculative, out of order execution of instructions
    Patent number: 5708841
    Abstract: A processor architecture is described which operates with improved computational efficiency using instruction fetching functions that are decoupled from instruction execution functions by a dynamic register file. The instruction fetching function operates in free-running mode which does not stop if a fetched instruction cannot be executed due to data being unavailable or due to other instruction dependencies. Branch instructions are taken in a predicted direction and the results of execution of all instructions are provisionally stored pending validation or invalidation on the basis of the dependencies becoming available later.
    Type: Grant
    Filed: September 17, 1996
    Date of Patent: January 13, 1998
    Assignee: Hyundai Electronics America
    Inventors: Valeri Popescu, Merle A. Schultz, Gary A. Gibson, John E. Spracklen, Bruce D. Lightner
  • Processor architecture providing out-of-order execution
    Patent number: 5627983
    Abstract: A processor architecture is described which operates with improved computational efficiency using instruction fetching functions that are decoupled from instruction execution functions by a dynamic register file. The instruction fetching function operates in free-running mode which does not stop if a fetched instruction cannot be executed due to data being unavailable or due to other instruction dependencies. Branch instructions are taken in a predicted direction and the results of execution of all instructions are provisionally stored pending validation or invalidation on the basis of the dependencies becoming available later.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: May 6, 1997
    Assignee: Hyundai Electronics America
    Inventors: Valeri Popescu, Merle A. Schultz, Gary A. Gibson, John E. Spracklen, Bruce D. Lightner
  • Processor architecture having out-of-order execution, speculative branching, and giving priority to instructions which affect a condition code
    Patent number: 5625837
    Abstract: A processor architecture is described which operates with improved computational efficiency using instruction fetching functions that are decoupled from instruction execution functions by a dynamic register file. The instruction fetching function operates in free-running mode which does not stop if a fetched instruction cannot be executed due to data being unavailable or due to other instruction dependencies. Branch instructions are taken in a predicted direction and the results of execution of all instructions are provisionally stored pending validation or invalidation on the basis of the dependencies becoming available later.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: April 29, 1997
    Assignee: Hyundai Electronics America
    Inventors: Valeri Popescu, Merle A. Schultz, Gary A. Gibson, John E. Spracklen, Bruce D. Lightner
  • Processor architecture supporting multiple speculative branches and trap handling
    Patent number: 5592636
    Abstract: A processor architecture is described which operates with improved computational efficiency using instruction fetching functions that are decoupled from instruction execution functions by a dynamic register file. The instruction fetching function operates in free-running mode which does not stop if a fetched instruction cannot be executed due to data being unavailable or due to other instruction dependencies. Branch instructions are taken in a predicted direction and the results of execution of all instructions are provisionally stored pending validation or invalidation on the basis of the dependencies becoming available later.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: January 7, 1997
    Assignee: Hyundai Electronics America
    Inventors: Valeri Popescu, Merle A. Schultz, Gary A. Gibson, John E. Spracklen, Bruce D. Lightner
  • Processor architecture supporting multiple speculative branching
    Patent number: 5561776
    Abstract: A processor architecture is described which operates with improved computational efficiency using instruction fetching functions that are decoupled from instruction execution functions by a dynamic register file. The instruction fetching function operates in free-running mode which does not stop if a fetched instruction cannot be executed due to data being unavailable or due to other instruction dependencies. Branch instructions are taken in a predicted direction and the results of execution of all instructions are provisionally stored pending validation or invalidation on the basis of the dependencies becoming available later.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: October 1, 1996
    Assignee: Hyundai Electronics America
    Inventors: Valeri Popescu, Merle A. Schultz, Gary A. Gibson, John E. Spracklen, Bruce D. Lightner
  • Processor architecture having independently fetching issuing and updating operations of instructions which are sequentially assigned and stored in order fetched
    Patent number: 5487156
    Abstract: A processor architecture is described which operates with improved computational efficiency using instruction fetching functions that are decoupled from instruction execution functions by a dynamic register file. The instruction fetching function operates in free-running mode which does not stop if a fetched instruction cannot be executed due to data being unavailable or due to other instruction dependencies. Branch instructions are taken in a predicted direction and the results of execution of all instructions are provisionally stored pending validation or invalidation on the basis of the dependencies becoming available later.
    Type: Grant
    Filed: December 5, 1990
    Date of Patent: January 23, 1996
    Inventors: Valeri Popescu, Merle A. Schultz, Gary A. Gibson, John E. Spracklen, Bruce D. Lightner