Abstract: A radio-frequency amplifier includes at least two double-ended electron discharge devices in coaxial-type, radio-frequency cavity-resonator circuits. Each discharge device has a discharge region so that the amplifier comprises a plurality of longitudinally spaced-apart, electrically connected discharge regions. Each of the discharge regions has a cathode with an anode circumscribing the cathode. At least one grid electrode is disposed between the cathode and the anode. A coaxial input transmission line is loop-coupled to an input cavity-resonator circuit and a coaxial output transmission line is loop-coupled to an output cavity-resonator circuit.

Abstract: FET circuitry is described which may be substituted for a programmable unijunction transistor particularly on CMOS-FET integrated circuits. The FET circuitry is arranged between first and second terminals defining a conduction path exhibiting a negative resistance characteristic and a control terminal for establishing the peak voltage of such characteristic. A P-type MOS transistor has its source and gate electrodes respectively connected to the first and control terminals. A current mirror amplifier comprising N-type MOS transistors has its input terminal connected to the drain electrode of the P-type transistor, its output terminal connected to the control terminal and its common terminal connected to the second terminal of the circuitry.

Abstract: An operational amplifier employing complementary MOSFET transistors includes first and second differential amplifiers respectively employing complementary conductivity type transistors. The input connections of the first and second differential amplifiers connect in parallel to receive the same input signal, the common-mode voltage of which may vary to and include first and second supply potentials. First and second current mirror amplifiers, respectively employing complementary conductivity type transistors, have input connections to which first and second output connections of the first differential amplifier respectively connect, and have output connections connected to an output terminal. Third and fourth current mirror amplifiers, respectively employing complementary conductivity type transistors, have input connections to which first and second output connections of the second differential amplifier respectively connect, and have output connections connected to the output terminal.

Abstract: A bridge amplifier is provided wherein one end of a load device is driven by a first amplifier and the other end of the load device is driven by a second amplifier. The second amplifier is an inverting amplifier comprising P and N-channel field-effect transistors, having complementary symmetry conduction characteristics. The input to the second amplifier is directly coupled to the output of the first amplifier.

Abstract: A complementary symmetry amplifier having variable gain control is used in an automatic gain control (AGC) system. The amplifier includes first and second field effect transistors of opposite conductivity type. Variable gain control is achieved by applying first and second differential control signals to respective gate electrodes of said first and second field effect transistors.

Abstract: Class AB push-pull amplifiers using a pair of complementary metal-oxide-semiconductor CMOS field effect transistors in source-follower connections in its driver stage and using a pair of non-linear current amplifiers with complementary conduction characteristics in its push-pull output stage.

Abstract: An operational amplifier includes first and second differential-input amplifiers of complementary conductivity type, each such differential-input amplifier including first and second transistors in long-tailed pair configuration having their drains connected to third and fourth transistors connected in current mirror amplifier configuration. An output amplifier includes a pair of complementary conductivity type transistors, each in common-source configuration, to supply signals to an output terminal. One output of the long-tailed pair and the output connection of the current mirror amplifier in the first differential-input amplifier directly connect to the gate of the first common-source amplifier. One output connection of the long-tailed pair and the output connection of the current mirror amplifier of the second differential-input amplifier directly connect to the gate input of the other common-source amplifier. A tail current supply for each long-tailed pair establishes its quiescent operating point.

Abstract: A complementary field-effect transistor amplifier includes first, second, and third FET inverter amplifiers. Input signals are applied to input connections of the first and third inverter amplifiers and the output connections thereof respectively connect to first and second nodes. The first node connects to the input connection of the second inverter amplifier, the output connection of which amplifier connects to the second node where the input signals are combined. A fourth inverter amplifier includes a degenerative feedback connection and has its output connected for providing a load at the first node. Signals responsive to the combination of the first and second input signals can be further amplified by a fifth inverter amplifier and supplied therefrom to an output terminal.

Abstract: The output stage of a quasi-linear amplifier employs a p-channel and an n-channel FET with their sources at relatively positive and relatively negative operating voltage rails to drive a load from their drain-to-drain connection, so that despite their being enhancement types full rail-to-rail output voltage capability can be obtained without need for bootstrapping. Input signal voltage and direct-coupled feedback voltage are applied to the gate-to-gate connection of p-channel and n-channel source-followers with their respective sources direct-coupled to the gate of the p-channel FET in the output stage and to the gate of the n-channel FET in the output stage, respectively, and with their respective drains connected to the relatively positive operating voltage rail and to the relatively negative operating voltage rail, respectively, in a representative driver stage.

Abstract: A complementary or quasi-complementary Class B transistor amplifier stage, the halves of which have their output circuits serially connected between relatively negative and relatively positive operating supply voltages to receive direct current and are operated in push-pull with each other for signal to supply a common load from the interconnection of their output circuits, has driver circuitry including a pair of field effect transistors operated in push-pull to supply respective halves of the Class B transistor amplifier. A p-channel field effect transistor with source electrode connected to the relatively positive operating supply voltage drives one half of the Class B transistor amplifier stage from its drain electrode, and an n-channel field effect transistor with source electrode connected to the relatively negative operating supply voltage drives the other half of the Class B transistor amplifier stage.

Abstract: Protection apparatus responsive to a fault condition in a high voltage, high current device to be protected; includes an ignitron and a hydrogen thyratron, connected in parallel across the device under protection, such that in event of a fault in the protected device, current is tandemly shunted away from the faulting device. Both the hydrogen thyratron and the ignitron receive simultaneous triggering signals from a fault-detection circuit upon the occurrence of a fault in the device under protection. Since the hydrogen thyratron responds to the fault-trigger signal more rapidly than the ignitron, it establishes a current-shunting path in the first fraction of a microsecond until such time as the slower-responding ignitron can become conductive and carry the brunt of the current to be shunted away from the faulting protected device.

Abstract: An input signal comprising a carrier wave whose frequency may vary is applied to two complementary conductivity type transistors. Two resonant circuits, one tuned to a frequency slightly higher than and the other tuned to a frequency slightly lower than that of the nominal center frequency of the carrier wave are coupled between the respective drain electrodes of these transistors and a circuit node. The voltages developed across these resonant circuits are detected and the detection components subtracted from one another to obtain the circuit output signal.