Abstract: An active thermal interposer (ATI) device for use in testing integrated circuit device under test (DUT) having thermal isolation structures. The ATI device includes a formation having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate, and a plurality of heating zones defined across a second surface of the formation, the plurality of heating zones operable to be controlled by a thermal controller to selectively heat and maintain respective temperatures thereof, the plurality of heating zones operable to heat a plurality of areas of the DUT when the second surface of the formation is disposed adjacent to an interface surface of the DUT during testing of the DUT. The ATI device includes a plurality of thermal resistance structures configured to resist thermal conductance between the plurality of heating zones.

Abstract: Active thermal interposer (ATI) device for use in testing a device under test (DUT). The ATI device includes a body layer having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate and wherein the second surface is operable to be disposed in proximity to the DUT. The body layer further includes a heating layer defining a plurality of heating zones across the second surface. The plurality of heating zones are operable to be controlled during the testing to selectively heat and maintain respective temperatures thereof. The heating layer further includes a plurality of heating structures operable to selectively heat and maintain temperatures of the plurality of heating zones, and a plurality of thermal resistance structures operable to resist thermal conductance between the plurality of heating zones.

Abstract: An active thermal interposer (ATI) device for use in testing integrated circuit device under test (DUT) having thermal isolation structures. The ATI device includes a formation having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate, and a plurality of heating zones defined across a second surface of the formation, the plurality of heating zones operable to be controlled by a thermal controller to selectively heat and maintain respective temperatures thereof, the plurality of heating zones operable to heat a plurality of areas of the DUT when the second surface of the formation is disposed adjacent to an interface surface of the DUT during testing of the DUT. The ATI device includes a plurality of thermal resistance structures configured to resist thermal conductance between the plurality of heating zones.

Abstract: A system for testing circuits of an integrated circuit semiconductor wafer includes a tester system testing the circuits of the wafer and a test stack coupled to the tester system. The test stack includes a wafer probe for contacting a first surface of the wafer and for probing individual circuits of the circuits of the wafer, a wafer scale active thermal interposer layer operable to contact a second surface of the wafer and containing a plurality of thermal zones corresponding to a die layout of the wafer and further operable to selectively heat areas of the wafer. The thermal zones are thermally isolated using a plurality of thermal resistance structures disposed between the thermal zones.