Abstract: A method for performing an etch process on a substrate includes applying a bias signal and a source signal to an electrode of a plasma processing system. The bias signal and the source signal are pulsed RF signals that together define a repeated pulsed RF cycle, wherein each pulsed RF cycle sequentially includes a first state, a second state, a third state, and a fourth state. The power level of the bias signal in the first state is greater than in the third state, which is greater than in the second state, which is greater than in the fourth state. The power level of the source signal in the first state is greater than in the third state, which is greater than in the second state, which is greater than in the fourth state.

Abstract: A method for performing a plasma etch process is provided. The method initiates with receiving a substrate into a chamber. A high frequency (HF) RF signal is generated, said HF RF signal being pulsed in at least a three-state cycle including a first state, a second state, and a third state. The first state is configured at a first power level; the second state is configured at a second power level less than the first power level; and, the third state is configured at a third power level less than the second power level. The second power level of the HF RF signal being in the range of about 0 W to 3500 W. The HF RF signal is applied to an electrode of the chamber for performing the plasma etch process.

Abstract: Various embodiments herein relate to methods and apparatus for etching a feature in a substrate. Often, the feature is etched in the context of forming a DRAM or other memory device. The feature is etched in dielectric material, which often includes a silicon oxide. The feature is etched using chemistry that includes a metal-containing gas such as tungsten hexafluoride. Although other metal-containing gases are commonly used as deposition gases (e.g., to deposit metal-containing films), they can also be used during etching. Advantageously, the inclusion of a metal-containing gas in the etch chemistry can increase the selectivity of the etch and/or improve the feature-to-feature uniformity (e.g., improve LCDU).

Abstract: A method of etching recessed features in a stack with a silicon containing layer over a wafer on a substrate support is provided. The substrate support is maintained at a temperature below about 30° C. An etch ga, comprising an organochloride source selected from the group consisting of carbon tetrachloride (CCl4), CxHyClz (where x>0 and z>0), and combinations thereof, a carbon source, a fluorine source, and a hydrogen source is flowed. The etch gas is formed into a plasma. The stack is exposed to the plasma to etch recessed features into the stack.

Abstract: A method for performing an etch process on a substrate includes applying a bias signal and a source signal to an electrode of a plasma processing system. The bias signal and the source signal are pulsed RF signals that together define a repeated pulsed RF cycle, wherein each pulsed RF cycle sequentially includes a first state, a second state, a third state, and a fourth state. The power level of the bias signal in the first state is greater than in the third state, which is greater than in the second state, which is greater than in the fourth state. The power level of the source signal in the first state is greater than in the third state, which is greater than in the second state, which is greater than in the fourth state.

Abstract: A method for etching a stack is described. The method includes etching a first nitrogen-containing layer of the stack by applying a non-metal gas and discontinuing the application of the non-metal gas upon determining that a first oxide layer is reached. The first oxide layer is under the first nitrogen-containing layer. The method further includes etching the first oxide layer by applying a metal-containing gas. The application of the metal-containing gas is discontinued upon determining that a second nitrogen-containing layer will be reached. The second nitrogen-containing layer is situated under the first oxide layer. The method includes etching the second nitrogen-containing layer by applying the non-metal gas.

Abstract: High aspect ratio features are formed in a substrate using etching and deposition processes. A partially etched feature is formed by exposure to plasma in a plasma etch chamber. A metal-based liner is subsequently deposited in the partially etched feature using the same plasma etch chamber. The metal-based liner is robust and prevents lateral etch in subsequent etching operations. The metal-based liner may be deposited at temperatures or pressures comparable to temperatures or pressures for etch processes. The metal-based liner may be localized in certain portions of the partially etched feature. Etching proceeds within the feature after deposition without lateral etching in regions where the metal-based liner is deposited.

Abstract: A method for controlling a critical dimension of a mask layer is described. The method includes receiving a first primary parameter level, a second primary parameter level, a first secondary parameter level, a second secondary parameter level, and a third secondary parameter level. The method also includes generating a primary signal having the first primary parameter level, and transitioning the primary signal from the first primary parameter level to the second primary parameter level. The method further includes generating a secondary radio frequency (RF) signal having the first secondary parameter level, and transitioning the secondary RF signal from the first secondary parameter level to the second secondary parameter level. The method includes transitioning the secondary RF signal from the second secondary parameter level to the third secondary parameter level.

Abstract: A method for performing an etch process on a substrate in a plasma processing system, including: applying source RF power and bias RF power to an electrode; wherein the source RF power and the bias RF power are pulsed signals that together define a plurality of multi-state pulsed RF cycles, each cycle having a first state, second state, and third state; wherein the first state is defined by the source RF power having a first source RF power level and the bias RF power having a first bias RF power level; wherein the second state is defined by the source RF power and the bias RF power having substantially zero power levels; wherein the third state is defined by the source RF power having a second source RF power level less than the first source RF power level, and the bias RF power having a substantially zero power level.

Abstract: Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in a dielectric-containing stack on a semiconductor substrate. In many embodiments, a mask shrink layer is deposited on a patterned mask layer to thereby narrow the openings in the mask layer. The mask shrink layer may be deposited through a vapor deposition process including, but not limited to, atomic layer deposition or chemical vapor deposition. The mask shrink layer can result in narrower, more vertically uniform etched features. In some embodiments, etching is completed in a single etch step. In some other embodiments, the etching may be done in stages, cycled with a deposition step designed to deposit a protective sidewall coating on the partially etched features. Metal-containing films are particularly suitable as mask shrink films and protective sidewall coatings.

Abstract: Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in a dielectric-containing stack on a semiconductor substrate. In many embodiments, a mask shrink layer is deposited on a patterned mask layer to thereby narrow the openings in the mask layer. The mask shrink layer may be deposited through a vapor deposition process including, but not limited to, atomic layer deposition or chemical vapor deposition. The mask shrink layer can result in narrower, more vertically uniform etched features. In some embodiments, etching is completed in a single etch step. In some other embodiments, the etching may be done in stages, cycled with a deposition step designed to deposit a protective sidewall coating on the partially etched features. Metal-containing films are particularly suitable as mask shrink films and protective sidewall coatings.

Abstract: Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in a dielectric-containing stack on a semiconductor substrate. In many embodiments, a mask shrink layer is deposited on a patterned mask layer to thereby narrow the openings in the mask layer. The mask shrink layer may be deposited through a vapor deposition process including, but not limited to, atomic layer deposition or chemical vapor deposition. The mask shrink layer can result in narrower, more vertically uniform etched features. In some embodiments, etching is completed in a single etch step. In some other embodiments, the etching may be done in stages, cycled with a deposition step designed to deposit a protective sidewall coating on the partially etched features. Metal-containing films are particularly suitable as mask shrink films and protective sidewall coatings.