Patents by Inventor Mi Hye Jun

Mi Hye Jun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190088780
    Abstract: A DEMOS transistor includes a semiconductor substrate defining a field region and an active region, a gate pattern disposed on the semiconductor substrate, the gate pattern being positioned over both the active region and the field region, drift regions disposed in the active region and positioned adjacent to both sides of the gate pattern, high concentration ion regions disposed in the drift regions, and being spaced apart from the gate pattern, and a silicide blocking layer having a exposure hole exposing one of an upper surface of the gate pattern and the high concentration ion regions, the silicide blocking layer having a ring shape to at least partially surround one of the upper surface of the gate pattern and the high concentration ion regions.
    Type: Application
    Filed: September 19, 2018
    Publication date: March 21, 2019
    Inventors: Kee Joon CHOI, Bon Sug KOO, Bum Seok KIM, Mi Hye JUN, Hae Taek KIM, Duk Joo WOO
  • Patent number: 10008594
    Abstract: A high voltage semiconductor device includes a gate electrode structure disposed on a substrate, a source region disposed in the substrate to be adjacent to one side of the gate electrode structure, a first drift region disposed in the substrate to be adjacent to another side of the gate electrode structure, a drain region electrically connected with the first drift region, and a device isolation region disposed on one side of the drain region. Particularly, the first drift region is spaced apart from the device isolation region.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: June 26, 2018
    Assignee: DB HITEK CO., LTD.
    Inventors: Kee Joon Choi, Bum Seok Kim, Bon Sug Koo, Mi Hye Jun, Hae Taek Kim, Duk Joo Woo
  • Publication number: 20170278922
    Abstract: A high voltage semiconductor device includes a gate electrode structure disposed on a substrate, a source region disposed in the substrate to be adjacent to one side of the gate electrode structure, a first drift region disposed in the substrate to be adjacent to another side of the gate electrode structure, a drain region electrically connected with the first drift region, and a device isolation region disposed on one side of the drain region. Particularly, the first drift region is spaced apart from the device isolation region.
    Type: Application
    Filed: March 10, 2017
    Publication date: September 28, 2017
    Inventors: Kee Joon Choi, Bum Seok Kim, Bon Sug Koo, Mi Hye Jun, Hae Taek Kim, Duk Joo Woo