Patents by Inventor Mi Ja Han
Mi Ja Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240114778Abstract: The present disclosure relates to an organic electroluminescent compound, a plurality of host materials, and an organic electroluminescent device comprising the same. By comprising the compound according to the present disclosure or by comprising a specific combination of compounds according to the present disclosure as a plurality of host materials, it is possible to produce an organic electroluminescent device having improved driving voltage, luminous efficiency, and/or lifetime properties compared to the conventional organic electroluminescent devices.Type: ApplicationFiled: August 14, 2023Publication date: April 4, 2024Inventors: So-Young JUNG, Hyo-Nim SHIN, Seung-Hyun YOON, Hyun-Ju KANG, Ye-Jin JEON, Tae-Jun HAN, Mi-Ja LEE, Dong-Gil KIM, Sang-Hee CHO
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Patent number: 11069666Abstract: A semiconductor package includes a frame having a through-hole, and a first semiconductor chip disposed in the through-hole of the frame and having an active surface on which a connection pad is disposed, an inactive surface opposing the active surface, and a side surface connecting the active and inactive surfaces. A first encapsulant covers at least a portion of each of the inactive surface and the side surface of the first semiconductor chip. A connection structure has a first surface having disposed thereon the active surface of the first semiconductor chip, and includes a redistribution layer electrically connected to the connection pad of the first semiconductor chip. A first passive component is disposed on a second surface of the connection structure opposing the first surface, the first passive component being electrically connected to the redistribution layer and having a thickness greater than a thickness of the first semiconductor chip.Type: GrantFiled: June 27, 2019Date of Patent: July 20, 2021Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Chui Kyu Kim, Dae Hyun Park, Jung Ho Shim, Jae Hyun Lim, Mi Ja Han, Sang Jong Lee, Han Kim
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Patent number: 10923433Abstract: A fan-out semiconductor package includes a connection member including an insulating layer and a redistribution layer, a semiconductor chip disposed on the connection member, an encapsulant encapsulating the semiconductor chip, and an electromagnetic wave shielding layer disposed on the semiconductor chip and including a plurality of degassing holes. The electromagnetic wave shielding layer includes a first region and a second region in which densities of the degassing holes are different from each other, the first region having a density of the degassing holes higher than a density of the degassing holes in the second region.Type: GrantFiled: August 20, 2018Date of Patent: February 16, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Mi Ja Han, Dae Hyun Park, Seong Hwan Lee, Sang Jong Lee
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Patent number: 10842021Abstract: A printed circuit board includes a magnetic member including a magnetic layer, a first coil pattern disposed above the magnetic member, and having a planar spiral structure, and a second coil pattern disposed below the magnetic member, and having a planar spiral structure.Type: GrantFiled: February 26, 2020Date of Patent: November 17, 2020Assignee: SAMSUNG ELECTRO-MECHANICS CO. LTD.Inventors: Seung Jae Song, Seong Hee Choi, Sang Jong Lee, Mi Ja Han
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Patent number: 10770403Abstract: A fan-out semiconductor package includes a connection member including an insulating layer and a redistribution layer, a semiconductor chip disposed on the connection member, an encapsulant encapsulating the semiconductor chip, and an electromagnetic radiation blocking layer disposed above the semiconductor chip and including a base layer in which a plurality of degassing holes are formed and a porous blocking portion filled in the plurality of degassing holes.Type: GrantFiled: November 21, 2018Date of Patent: September 8, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Mi Ja Han, Han Kim, Seong Chan Park
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Publication number: 20200168591Abstract: A semiconductor package includes a frame having a through-hole, and a first semiconductor chip disposed in the through-hole of the frame and having an active surface on which a connection pad is disposed, an inactive surface opposing the active surface, and a side surface connecting the active and inactive surfaces. A first encapsulant covers at least a portion of each of the inactive surface and the side surface of the first semiconductor chip. A connection structure has a first surface having disposed thereon the active surface of the first semiconductor chip, and includes a redistribution layer electrically connected to the connection pad of the first semiconductor chip. A first passive component is disposed on a second surface of the connection structure opposing the first surface, the first passive component being electrically connected to the redistribution layer and having a thickness greater than a thickness of the first semiconductor chip.Type: ApplicationFiled: June 27, 2019Publication date: May 28, 2020Inventors: Chul Kyu KIM, Dae Hyun PARK, Jung Ho SHIM, Jae Hyun LIM, Mi Ja HAN, Sang Jong LEE, Han KIM
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Patent number: 10600679Abstract: A fan-out semiconductor package includes a first connection member having a through-hole, first and second semiconductor chips disposed in the through-hole, an encapsulant encapsulating at least portions of the first connection member, the first semiconductor chip, and the second semiconductor chip, and a second connection member disposed on the first connection member and on active surfaces of the first semiconductor chip and the second semiconductor chip. A redistribution layer of the second connection member is respectively connected to both the first and second connection pads through first and second conductors, and the second conductor has a height greater than that of the first conductor.Type: GrantFiled: August 3, 2017Date of Patent: March 24, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Han Kim, Mi Ja Han, Dae Hyun Park
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Patent number: 10475751Abstract: A fan-out semiconductor package includes: a core member having at least one through-hole formed therein and having a metal layer disposed on an internal surface thereof; an electronic component disposed in the through-hole; an encapsulant encapsulating the core member and the electronic component; a metal plate disposed on an upper surface of the encapsulant; and a wall penetrating the encapsulant to connect the metal layer and the metal plate to each other. The wall includes sections spaced apart from each other.Type: GrantFiled: August 31, 2018Date of Patent: November 12, 2019Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Seong Hee Choi, Han Kim, Hyung Joon Kim, Mi Ja Han
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Publication number: 20190341353Abstract: A fan-out semiconductor package includes a connection member including an insulating layer and a redistribution layer, a semiconductor chip disposed on the connection member, an encapsulant encapsulating the semiconductor chip, and an electromagnetic wave shielding layer disposed on the semiconductor chip and including a plurality of degassing holes. The electromagnetic wave shielding layer includes a first region and a second region in which densities of the degassing holes are different from each other, the first region having a density of the degassing holes higher than a density of the degassing holes in the second region.Type: ApplicationFiled: August 20, 2018Publication date: November 7, 2019Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Mi Ja HAN, Dae Hyun PARK, Seong Hwan LEE, Sang Jong LEE
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Publication number: 20190341355Abstract: A fan-out semiconductor package includes a connection member including an insulating layer and a redistribution layer, a semiconductor chip disposed on the connection member, an encapsulant encapsulating the semiconductor chip, and an electromagnetic radiation blocking layer disposed above the semiconductor chip and including a base layer in which a plurality of degassing holes are formed and a porous blocking portion filled in the plurality of degassing holes.Type: ApplicationFiled: November 21, 2018Publication date: November 7, 2019Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Mi Ja HAN, Han KIM, Seong Chan PARK
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Patent number: 10373884Abstract: The fan-out semiconductor package includes: a semiconductor chip having an active surface having a connection pad disposed thereon and an inactive surface disposed to oppose the active surface; a first capacitor disposed adjacently to the semiconductor chip; an encapsulant at least partially encapsulating the first connection member and the semiconductor chip; a first connection member disposed on the encapsulant, the first capacitor, and the semiconductor chip, and a second capacitor disposed on the other surface of the first connection member opposing one surface of the first connection member on which the semiconductor chip is disposed, wherein the first connection member includes a redistribution layer electrically connected to the connection pad of the semiconductor chip, the first capacitor, and the second capacitor, and the first capacitor and the second capacitor are electrically connected to the connection pad through a common power wiring of the redistribution layer.Type: GrantFiled: September 28, 2016Date of Patent: August 6, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Han Kim, Mi Ja Han, Kang Heon Hur, Young Gwan Ko
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Publication number: 20190237406Abstract: A fan-out semiconductor package includes: a core member having at least one through-hole formed therein and having a metal layer disposed on an internal surface thereof; an electronic component disposed in the through-hole; an encapsulant encapsulating the core member and the electronic component; a metal plate disposed on an upper surface of the encapsulant; and a wall penetrating the encapsulant to connect the metal layer and the metal plate to each other. The wall includes sections spaced apart from each other.Type: ApplicationFiled: August 31, 2018Publication date: August 1, 2019Inventors: Seong Hee CHOI, Han KIM, Hyung Joon KIM, Mi Ja HAN
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Patent number: 10304807Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip.Type: GrantFiled: April 12, 2018Date of Patent: May 28, 2019Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Dae Hyun Park, Eun Jung Jo, Sung Won Jeong, Han Kim, Mi Ja Han
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Patent number: 10217631Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads. The first connection member includes a first electromagnetic interference (EMI) blocking part surrounding side surfaces of the semiconductor chip, the second connection member includes a second EMI blocking part surrounding the redistribution layer, and the first EMI blocking part and the second EMI blocking part are connected to each other.Type: GrantFiled: August 9, 2017Date of Patent: February 26, 2019Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Han Kim, Mi Ja Han, Dae Hyun Park, Sang Jong Lee, Seong Hee Choi
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Patent number: 10157886Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip.Type: GrantFiled: February 21, 2017Date of Patent: December 18, 2018Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Dae Hyun Park, Eun Jung Jo, Sung Won Jeong, Han Kim, Mi Ja Han
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Patent number: 10121769Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip.Type: GrantFiled: February 21, 2017Date of Patent: November 6, 2018Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Dae Hyun Park, Eun Jung Jo, Sung Won Jeong, Han Kim, Mi Ja Han
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Patent number: 10083929Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole; an encapsulant encapsulating at least portions of the first connection member and the semiconductor chip; and a second connection member disposed on the first connection member and the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, the second connection member includes a coil pattern layer electrically connected to the connection pads of the semiconductor chip, and at least one of the first connection member and the second connection member includes a dummy pattern layer.Type: GrantFiled: August 1, 2017Date of Patent: September 25, 2018Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Seong Hee Choi, Han Kim, Dae Hyun Park, Mi Ja Han
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Publication number: 20180233489Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip.Type: ApplicationFiled: April 12, 2018Publication date: August 16, 2018Inventors: Dae Hyun PARK, Eun Jung JO, Sung Won JEONG, Han KIM, Mi Ja HAN
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Publication number: 20180174994Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole; an encapsulant encapsulating at least portions of the first connection member and the semiconductor chip; and a second connection member disposed on the first connection member and the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, the second connection member includes a coil pattern layer electrically connected to the connection pads of the semiconductor chip, and at least one of the first connection member and the second connection member includes a dummy pattern layer.Type: ApplicationFiled: August 1, 2017Publication date: June 21, 2018Inventors: Seong Hee CHOI, Han KIM, Dae Hyun PARK, Mi Ja HAN
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Publication number: 20180138083Abstract: A fan-out semiconductor package includes a first connection member having a through-hole, first and second semiconductor chips disposed in the through-hole, an encapsulant encapsulating at least portions of the first connection member, the first semiconductor chip, and the second semiconductor chip, and a second connection member disposed on the first connection member and on active surfaces of the first semiconductor chip and the second semiconductor chip. A redistribution layer of the second connection member is respectively connected to both the first and second connection pads through first and second conductors, and the second conductor has a height greater than that of the first conductor.Type: ApplicationFiled: August 3, 2017Publication date: May 17, 2018Inventors: Han KIM, Mi Ja HAN, Dae Hyun PARK