Patents by Inventor Mi-Lim Park
Mi-Lim Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240097799Abstract: Disclosed is an amplification circuit, which includes a first amplifier that receives an external signal and performs first band pass filtering on the external signal to output a first filter signal, and a second amplifier that receives the first filter signal and performs second band pass filtering on the first filter signal to output a second filter signal, and a frequency pass bandwidth of the second band pass filtering is narrower than a frequency pass bandwidth of the first band pass filtering.Type: ApplicationFiled: June 26, 2023Publication date: March 21, 2024Applicant: Electronics and Telecommunications Research InstituteInventors: Sung Eun KIM, Tae Wook KANG, Hyuk KIM, Kyung Hwan PARK, Mi Jeong PARK, Hyung-IL PARK, Kyung Jin BYUN, Kwang IL OH, Jae-Jin LEE, In Gi LIM
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Patent number: 11923882Abstract: A hybrid communication device, an operation method thereof, and a communication system including the same are provided. The hybrid communication device includes a contact unit that includes an antenna for receiving a first communication signal and an electrode for receiving a second signal, a switch controller that includes a first switch and a second switch and controls the first switch and the second switch based on a change in capacitance of the electrode, and a signal processing unit that receives at least one of the first communication signal and the second communication signal from the contact unit via the first switch and processes the received signal. The first switch is connected to the contact unit, and the signal processing unit is connected to the first switch.Type: GrantFiled: March 25, 2021Date of Patent: March 5, 2024Assignee: Electronics and Telecommunications Research InstituteInventors: Tae Wook Kang, Sung Eun Kim, Hyung-Il Park, Jae-Jin Lee, Hyuk Kim, Kyung Hwan Park, Mi Jeong Park, Kyung Jin Byun, Kwang Il Oh, In Gi Lim
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Patent number: 10164173Abstract: Magnetic random access memory (MRAM) devices, and methods of manufacturing the same, include at least one first magnetic material pattern on a substrate, at least one second magnetic material pattern on the at least one first magnetic material pattern, and at least one tunnel barrier layer pattern between the at least one first magnetic material pattern and the at least one second magnetic material pattern. A width of a top surface of the at least one first magnetic material pattern may be less than a width of a bottom surface of the at least one second magnetic material pattern.Type: GrantFiled: July 25, 2017Date of Patent: December 25, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Kyu-Man Hwang, Shi-Jung Kim, Mi-Lim Park, Jun-Soo Bae, Seung-Woo Lee
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Publication number: 20170324031Abstract: Magnetic random access memory (MRAM) devices, and methods of manufacturing the same, include at least one first magnetic material pattern on a substrate, at least one second magnetic material pattern on the at least one first magnetic material pattern, and at least one tunnel barrier layer pattern between the at least one first magnetic material pattern and the at least one second magnetic material pattern. A width of a top surface of the at least one first magnetic material pattern may be less than a width of a bottom surface of the at least one second magnetic material pattern.Type: ApplicationFiled: July 25, 2017Publication date: November 9, 2017Applicant: Samsung Electronics Co., Ltd.Inventors: Kyu-Man HWANG, Shi-Jung KIM, Mi-Lim PARK, Jun-Soo BAE, Seung-Woo LEE
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Patent number: 9761792Abstract: Magnetic random access memory (MRAM) devices, and methods of manufacturing the same, include at least one first magnetic material pattern on a substrate, at least one second magnetic material pattern on the at least one first magnetic material pattern, and at least one tunnel barrier layer pattern between the at least one first magnetic material pattern and the at least one second magnetic material pattern. A width of a top surface of the at least one first magnetic material pattern may be less than a width of a bottom surface of the at least one second magnetic material pattern.Type: GrantFiled: October 20, 2015Date of Patent: September 12, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Kyu-Man Hwang, Shi-Jung Kim, Mi-Lim Park, Jun-Soo Bae, Seung-Woo Lee
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Publication number: 20160155934Abstract: Magnetic random access memory (MRAM) devices, and methods of manufacturing the same, include at least one first magnetic material pattern on a substrate, at least one second magnetic material pattern on the at least one first magnetic material pattern, and at least one tunnel barrier layer pattern between the at least one first magnetic material pattern and the at least one second magnetic material pattern. A width of a top surface of the at least one first magnetic material pattern may be less than a width of a bottom surface of the at least one second magnetic material pattern.Type: ApplicationFiled: October 20, 2015Publication date: June 2, 2016Inventors: Kyu-Man HWANG, Shi-Jung KIM, Mi-Lim PARK, Jun-Soo BAE, Seung-Woo LEE
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Patent number: 8581612Abstract: A probe card and a test apparatus including the probe card for improving test reliability. The probe card may include a first input terminal Microelectromechanical Systems (MEMS) switch that connects a first input terminal and a first input probe pin, wherein the first input terminal MEMS switch comprises a control portion that receives an operation signal and a connection portion that connects the first input terminal and the first input probe pin. The probe card may further include a first output terminal MEMS switch that connects a first output terminal and a first output probe pin, wherein the first output terminal MEMS switch comprises a control portion that receives the operation signal and a connection portion that connects the first output terminal and the first output probe pin.Type: GrantFiled: June 17, 2010Date of Patent: November 12, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Hideki Horii, Young-kuk Kim, Mi-lim Park
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Publication number: 20120147658Abstract: A system for measuring a resistance of a memory cell in a resistive memory device can include a pulse generator configured to apply a data write pulse and a resistance read pulse to the resistive memory device with a delay time. A connecting member can be connected between the pulse generator and the resistive memory device. A test measurement device can be connected to the resistive memory device outputting a pulse waveform and a data-processing member can be configured to determine the resistance of the resistive memory device using the pulse waveform and an internal resistance of the test measurement device.Type: ApplicationFiled: February 17, 2012Publication date: June 14, 2012Inventors: Young-Kuk Kim, Mi-Lim Park, Hori Ihideki, Dong-Seok Suh
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Patent number: 8144507Abstract: A method of measuring a resistance of a memory cell in a resistive memory device can be provided by applying a data write pulse to a selected cell of the resistive memory device, applying a resistance read pulse to the selected cell after a delay time measured from a time of applying the data write pulse, measuring a drop voltage at the cell responsive to a pulse waveform output when applying the resistance read pulse to the selected cell, measuring a total current through the cell using the drop voltage and an internal resistance of a test device coupled to the cell, and determining a resistance of the resistive memory device using the total current and a voltage of the resistance read pulse.Type: GrantFiled: August 31, 2010Date of Patent: March 27, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Young-Kuk Kim, Mi-Lim Park, Hori Ihideki, Dong-Seok Suh
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Plasma treating methods of fabricating phase change memory devices, and memory devices so fabricated
Patent number: 8039297Abstract: Phase change memory devices may be fabricated by forming a first electrode on a substrate and forming a chalcogenide material on the first electrode. The chalcogenide material is plasma treated sufficiently to induce a plasma species throughout the chalcogenide material. A second electrode is formed on the chalcogenide material. Related devices are also described.Type: GrantFiled: June 18, 2009Date of Patent: October 18, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Young-Kuk Kim, Mi-Lim Park, Dong-Ho Ahn -
Publication number: 20110121852Abstract: A probe card and a test apparatus including the probe card for improving test reliability. The probe card may include a first input terminal Microelectromechanical Systems (MEMS) switch that connects a first input terminal and a first input probe pin, wherein the first input terminal MEMS switch comprises a control portion that receives an operation signal and a connection portion that connects the first input terminal and the first input probe pin. The probe card may further include a first output terminal MEMS switch that connects a first output terminal and a first output probe pin, wherein the first output terminal MEMS switch comprises a control portion that receives the operation signal and a connection portion that connects the first output terminal and the first output probe pin.Type: ApplicationFiled: June 17, 2010Publication date: May 26, 2011Inventors: Hideki Horii, Young-kuk Kim, Mi-lim Park
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Publication number: 20110051497Abstract: A method of measuring a resistance of a memory cell in a resistive memory device can be provided by applying a data write pulse to a selected cell of the resistive memory device, applying a resistance read pulse to the selected cell after a delay time measured from a time of applying the data write pulse, measuring a drop voltage at the cell responsive to a pulse waveform output when applying the resistance read pulse to the selected cell, measuring a total current through the cell using the drop voltage and an internal resistance of a test device coupled to the cell, and determining a resistance of the resistive memory device using the total current and a voltage of the resistance read pulse.Type: ApplicationFiled: August 31, 2010Publication date: March 3, 2011Inventors: Young-Kuk Kim, Mi-Lim Park, Hori Ihideki, Dong-Seok Suh
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Patent number: 7787278Abstract: Provided is a resistance variable memory device and a method for operating same. The resistance variable memory device has a phase change material between a top electrode and a bottom electrode. In the method for operating a resistance variable memory, the write current is applied in a direction from the top electrode to the bottom electrode, and the read current is applied in a direction from the bottom electrode to the top electrode. The phase change material is programmed by applying the write current, and a resistance drift of the phase change material is restrained by applying the read current.Type: GrantFiled: August 22, 2008Date of Patent: August 31, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Jun-Soo Bae, Hideki Horii, Mi-Lim Park
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PLASMA TREATING METHODS OF FABRICATING PHASE CHANGE MEMORY DEVICES, AND MEMORY DEVICES SO FABRICATED
Publication number: 20100051893Abstract: Phase change memory devices may be fabricated by forming a first electrode on a substrate and forming a chalcogenide material on the first electrode. The chalcogenide material is plasma treated sufficiently to induce a plasma species throughout the chalcogenide material. A second electrode is formed on the chalcogenide material. Related devices are also described.Type: ApplicationFiled: June 18, 2009Publication date: March 4, 2010Inventors: Young-Kuk Kim, Mi-Lim Park, Dong-Ho Ahn -
Publication number: 20090052236Abstract: Provided is a resistance variable memory device and a method for operating same. The resistance variable memory device has a phase change material between a top electrode and a bottom electrode. In the method for operating a resistance variable memory, the write current is applied in a direction from the top electrode to the bottom electrode, and the read current is applied in a direction from the bottom electrode to the top electrode. The phase change material is programmed by applying the write current, and a resistance drift of the phase change material is restrained by applying the read current.Type: ApplicationFiled: August 22, 2008Publication date: February 26, 2009Applicant: Samsung Electronics Co., Ltd.Inventors: Jun-Soo Bae, Hideki Horii, Mi-Lim Park