Abstract: A method of manufacturing a semiconductor device is provided. The method may include forming a stack, forming a preliminary stepped structure by patterning the stack, forming a first stepped structure, a second stepped structure, and an opening located between the first stepped structure and the second stepped structure by etching the preliminary stepped structure, forming a passivation layer that fills the opening and covers the first stepped structure, and forming a third stepped structure by etching the second stepped structure using the passivation layer as an etching barrier.

Abstract: A semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device including a stacked body including conductive patterns and insulating patterns that are alternately stacked, a filling layer configured to pass through the stacked body, a first channel layer configured to pass through the stacked body and coupled to the filling layer, a second channel layer configured to pass through the stacked body and coupled to the filling layer, a first interposed layer configured to pass through the stacked body and disposed between the first channel layer and the filling layer, a second interposed layer configured to pass through the stacked body and disposed between the second channel layer and the filling layer, and a memory layer surrounding the filling layer, the first and second channel layers, and the first and second interposed layers.

Abstract: There are provided a semiconductor memory device and a manufacturing method of a semiconductor memory device. The semiconductor memory device includes: a plurality of conductive layers stacked to be spaced apart from each other in a first direction; a channel hole extending in the first direction to penetrate the plurality of conductive layers; two or more channel patterns disposed to be spaced apart from each other along a sidewall of the channel hole; and two or more memory patterns disposed to be spaced apart from each other between the sidewall of the channel hole and the two or more channel patterns, respectively.

Abstract: Discussed is a light emitting device including a first electrode and a second electrode facing each other, a hole transport layer, a first emission layer, and an electron transport layer sequentially disposed between the first electrode and the second electrode. In the transport layer, a first material of a metal halide and a second material of an n-type inorganic compound are included. The second material is included as a dopant in the first material. The hole transport layer can contain no organic material and can be amorphous.

Abstract: Provided is a lubricating composition for inhibiting plugging including a base oil and any one selected from a fatty acid and an emulsifier, with the lubricating composition forming a single phase even when a carboxylic acid-based monomer is introduced with respect to the base oil. The lubricating composition suppresses plugging occurring in a process of preparing a copolymer derived from the carboxylic acid-based monomer. In addition, also provided is a method of inhibiting plugging using the lubricating composition for inhibiting plugging.

Abstract: The present disclosure includes a semiconductor memory device and a method of manufacturing the semiconductor memory device. The semiconductor memory device includes a stack including a plurality of conductive layers stacked to be spaced apart in a first direction, an opening in the stack extending in the first direction and having an elliptical shape in a plan view, and a first channel pattern and a second channel pattern spaced apart from each other in a second direction toward which a major axis of the elliptical shape faces in the opening, the first channel pattern and the second channel pattern extending in the first direction. Each of the first channel pattern and the second channel pattern includes a central portion overlapping with the major axis of the elliptical shape and bent portions extending away from the central portion.

Abstract: A semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device including a stacked body including conductive patterns and insulating patterns that are alternately stacked, a filling layer configured to pass through the stacked body, a first channel layer configured to pass through the stacked body and coupled to the filling layer, a second channel layer configured to pass through the stacked body and coupled to the filling layer, a first interposed layer configured to pass through the stacked body and disposed between the first channel layer and the filling layer, a second interposed layer configured to pass through the stacked body and disposed between the second channel layer and the filling layer, and a memory layer surrounding the filling layer, the first and second channel layers, and the first and second interposed layers.

Abstract: There are provided a memory device and a manufacturing method of the memory device. The memory device includes: a first stack structure including a word line of a first group and select lines of a first group; a second stack structure including select lines of a second group; a first plug in the first stack structure; a second plug connected to the first plug, the second plug being disposed in the second stack structure; a first isolation pattern between the select lines of the first group; and a second isolation pattern between the select lines of the second group.

Abstract: A memory device, and a method of manufacturing the same, includes a stacked structure including gate lines stacked to be spaced apart from each other. The memory device also includes a first channel structure vertical to the gate lines and including a major axis in a first direction. The memory device further includes a second channel structure configured to separate the first channel structure and including a major axis in a second direction orthogonal to the first direction. The first channel structure includes a first memory cell group and a second memory cell group separated from each other by the second channel structure. The second channel structure includes a third memory cell group and a fourth memory cell group separated from each other in the second direction.

Abstract: A semiconductor memory device is provided. The semiconductor memory device includes a gate stacked structure including conductive layers, each of the conductive layers extending in a first direction and a second direction and including a top surface facing a third direction, wherein the conductive layers are stacked to be spaced apart from each other in the third direction. Also, the semiconductor memory device includes a first channel structure and a second channel structure extending in the third direction to pass through the gate stacked structure and spaced apart from each other in the second direction, a first insulating layer disposed over the gate stacked structure, an etch stop layer disposed over the first insulating layer and including a trench, an insulating material in the trench, and a bit line contact passing through the insulating material.

Abstract: There are provided a memory device and a manufacturing method of the memory device. The memory device includes: a stack structure including gate lines stacked to be spaced apart from each other; main plugs arranged to be spaced apart from each other; plug isolation patterns isolating the main plugs into first and second sub-plugs; and a select isolation pattern isolating at least one gate line located between the plug isolation patterns adjacent to each other.

Abstract: A method of manufacturing a semiconductor device is provided. The method may include forming a stack, forming a preliminary stepped structure by patterning the stack, forming a first stepped structure, a second stepped structure, and an opening located between the first stepped structure and the second stepped structure by etching the preliminary stepped structure, forming a passivation layer that fills the opening and covers the first stepped structure, and forming a third stepped structure by etching the second stepped structure using the passivation layer as an etching barrier.

Abstract: A memory device, and a method of manufacturing the same, includes a stack structure and main plugs passing through the stack structure, the main plugs being spaced apart from each other in a first direction. The memory device also includes a separation pattern separating the main plugs in a second direction and a slit pattern separating the stack structure into first and second memory blocks, the slit pattern having an ellipse shape.

Abstract: A method of manufacturing a semiconductor device is provided. The method may include forming a stack, forming a preliminary stepped structure by patterning the stack, forming a first stepped structure, a second stepped structure, and an opening located between the first stepped structure and the second stepped structure by etching the preliminary stepped structure, forming a passivation layer that fills the opening and covers the first stepped structure, and forming a third stepped structure by etching the second stepped structure using the passivation layer as an etching barrier.

Abstract: A semiconductor memory device and a method of manufacturing the semiconductor memory device are provided. The semiconductor memory device includes a gate stacked structure with a cell array region and a contact region with a stepped shape, and a roughness of a first sidewall of the cell array region is greater than that of a second sidewall of the contact region.

Abstract: A semiconductor device includes a gate structure including conductive layers and insulating layers alternately stacked with each other, channel structures passing through the gate structure and arranged in a first direction, a cutting structure extending in the first direction and passing through the channel structures, and a first slit structure passing through the gate structure and extending in a second direction crossing the first direction.

Abstract: There are provided a memory device and a manufacturing method of the memory device. The memory device includes: a first gate stack structure and a second gate stack structure, disposed on a substrate; and a slit disposed between the first gate stack structure and the second gate stack structure to electrically isolate the first gate stack structure and the second gate stack structure from each other.

Abstract: A method of manufacturing a semiconductor device is provided. The method may include forming a stack, forming a preliminary stepped structure by patterning the stack, forming a first stepped structure, a second stepped structure, and an opening located between the first stepped structure and the second stepped structure by etching the preliminary stepped structure, forming a passivation layer that fills the opening and covers the first stepped structure, and forming a third stepped structure by etching the second stepped structure using the passivation layer as an etching barrier.

Abstract: A semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device including a stacked body including conductive patterns and insulating patterns that are alternately stacked, a filling layer configured to pass through the stacked body, a first channel layer configured to pass through the stacked body and coupled to the filling layer, a second channel layer configured to pass through the stacked body and coupled to the filling layer, a first interposed layer configured to pass through the stacked body and disposed between the first channel layer and the filling layer, a second interposed layer configured to pass through the stacked body and disposed between the second channel layer and the filling layer, and a memory layer surrounding the filling layer, the first and second channel layers, and the first and second interposed layers.