Abstract: A method of forming a contact hole in a semiconductor device while maintaining intended electrical isolation of electrical conductive material layers, even in the presence of mask misalignment/excessive etching which may occur during the fabrication process of the contact hole and the resulting device are disclosed. The method comprises the formation of an etch barrier layer to provide an isotropic etching barrier and an electrically insulating layer for the conductive material layers which are positioned proximate the contact hole. Thus, when the contact hole is formed by anisotropically etching to expose the surface of the diffusion region an electrical short cannot occur between conductive material layers proximate the contact hole and conductive material which is deposited into the contact hole.