Patents by Inventor Mia Honore

Mia Honore has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6825104
    Abstract: The present invention describes a method of manufacturing a semiconductor device, comprising a semiconductor substrate in the shape of a slice, the method comprising the steps of: step 1) selectively applying a pattern of a solids-based dopant source to a first major surface of said semiconducting substrate; step 2) diffusing the dopant atoms from said solids-based dopant source into said substrate by a controlled heat treatment step in a gaseous environment surrounding said semi-conducting substrate, the dopant from said solids-based dopant source diffusing directly into said substrate to form a first diffusion region and, at the same time, diffusing said dopant from said solids-based dopant source indirectly via said gaseous environment into said substrate to form a second diffusion region in at least some areas of said substrate to form a second diffusion region in at least some areas of said substrate not covered by said pattern; and step 3) forming a metal contact pattern substantially in alignment with
    Type: Grant
    Filed: January 27, 2003
    Date of Patent: November 30, 2004
    Assignee: Interuniversitair Micro-Elektronica Centrum (IMEC)
    Inventors: Jörg Horzel, Jozef Szlufcik, Mia Honoré, Johan Nijs
  • Publication number: 20030134469
    Abstract: The present invention describes a method of manufacturing a semiconductor device, comprising a semiconductor substrate in the shape of a slice, the method comprising the steps of: step 1) selectively applying a pattern of a solids-based dopant source to a first major surface of said semiconducting substrate; step 2) diffusing the dopant atoms from said solids-based dopant source into said substrate by a controlled heat treatment step in a gaseous environment surrounding said semi-conducting substrate, the dopant from said solids-based dopant source diffusing directly into said substrate to form a first diffusion region and, at the same time, diffusing said dopant from said solids-based dopant source indirectly via said gaseous environment into said substrate to form a second diffusion region in at least some areas of said substrate to form a second diffusion region in at least some areas of said substrate not covered by said pattern; and step 3) forming a metal contact pattern substantially in alignment with
    Type: Application
    Filed: January 27, 2003
    Publication date: July 17, 2003
    Applicant: IMEC vzw, a research center in the country of Belgium
    Inventors: Jorg Horzel, Jozef Szlufcik, Mia Honore, Johan Nijs
  • Patent number: 6552414
    Abstract: The present invention describes a method of manufacturing a semiconductor device, comprising a semiconductor substrate (2) in the shape of a slice, the method comprising the steps of: step 1) selectively applying a pattern of a solids-based dopant source to a first major surface of said semiconducting substrate (2); step 2) diffusing the dopant atoms from said solids-based dopant source into said substrate (2) by a controlled heat treatment step in a gaseous environment surrounding said semi-conducting substrate (2), the dopant from said solids-based dopant source diffusing directly into said substrate (2) to form a first diffusion region (12) and, at the time, diffusing said dopant from said solids-based dopant source indirectly via said gaseous environment into said substrate (2) to form a second diffusion region (15) in at least some areas of said substrate (2) not covered by said pattern; and step 3) forming a metal contact pattern (20) substantially in alignment with said first diffusion region (12) with
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: April 22, 2003
    Assignee: IMEC vzw
    Inventors: Jörg Horzel, Jozef Szlufcik, Mia Honoré, Johan Nijs