Abstract: The present disclosure relates to a bidirectional shift register unit, a bidirectional shift register, and a display panel, wherein the bidirectional shift register unit includes: an pull-up circuit is configured to transform first clock signals into scanning signals outputting at a current level, an pull-up control circuit is configured with a forward pull-up sub-circuit and a backward pull-up sub-circuit respectively configured to pull up a potential of a control end of the pull-up circuit when a forward scanning process or a backward scanning process is conducted, a pull-down circuit and a pull-down maintaining circuit are respectively configured to pull down and continuously pull down the potential of the control end of the pull-up circuit and the scanning signals outputting at the current level during a pull-down phase. As such, a bidirectional scanning process may be achieved.

Abstract: The present disclosure relates to a scanning-driving circuit and a liquid crystal display (LCD). The scanning-driving circuit includes: a plurality of cascaded-connected gate driver on array (GOA) units. Each of the GOA units includes a pull-up circuit, a controlling circuit, a down-transfer circuit, a pull-down circuit, and a pull-down maintaining unit. The controlling circuit includes a first controlling circuit and a second controlling circuit. When conducting a forward scanning process, the first controlling circuit is configured to turn on the pull-up circuit upon the scanning process has started, and the second controlling circuit is configured to turn off the pull-up circuit upon the scanning process has finished. When conducting a backward scanning process, the second controlling circuit is configured to turn on the pull-up circuit upon the scanning process has started, and the first controlling circuit is configured to turn off the pull-up circuit upon the scanning process has finished.

Abstract: The invention provides a manufacturing method for display panel, display panel and display device. The display panel comprises a plurality of pixel units. Each pixel unit comprises a light-emitting element and a TFT, the light-emitting element comprises: an anode and a first touch electrode, disposed in a same layer, a light-emitting layer disposed on the anode and the first touch electrode, and a first electrode disposed on the light-emitting layer. The first electrode serves as a cathode of the display panel and a second touch electrode of the display panel in a time division manner. As such, the invention can reduce the thickness of the display panel and thickness of display device.

Abstract: The present disclosure relates to a gate driver on array (GOA) unit. An output end of the pull-up controlling module, a control end of the pull-up circuit, a first end of the pull-down maintaining circuit, a first end of the pull-down circuit, a control end of the signal down-transfer circuit, and a first end of the bootstrap module connect to a gate signal point. A second end of the pull-down maintaining circuit, a second end of the pull-down circuit, a second end of the bootstrap module, and an output end of the pull-up circuit connect to a horizontal scanning line. A third end of the pull-down maintaining circuit and a third end of the pull-down circuit connect to a first level signal line. A fourth end of the pull-down maintaining circuit and a fourth end of the pull-down circuit connect to a second level signal line.

Abstract: Disclosed are a double-side gate driver on array circuit, a liquid crystal display panel, and a driving method. A technical problem to be solved is that double-side drive design which includes a GOA circuit unit having two pull-down holding parts cannot meet requirements for narrow-bezel display panel design when a narrow-bezel, large-size display device is manufactured. A solution of the double-side gate driver on array circuit is: GOA units of two opposite sides in a same row share one group of pull-down holding parts.

Abstract: Related to is the technical field of display panels, and in particular to a thin film transistor and a method for manufacturing the same. The thin film transistor provided on a substrate includes a drain, a source, a gate, and an active layer. The drain and the source are in a comb-like shape and are connected with the active layer through a first via hole and a second via hole, respectively. Such arrangement enables a width of a channel formed between the drain and the source to be increased and a layout scale of the thin film transistor to be reduced at the same time, whereby space is saved. When used in a GOA circuit or other circuits, the thin film transistor is helpful to achievement of a narrow-bezel design of a display panel.

Abstract: Disclosed is a GOA drive unit and drive circuit. The GOA drive unit includes a first pull-down transistor, a second pull-down transistor, a third pull-down transistor, a fourth pull-down transistor, a fifth pull-down transistor that is configured to maintain a low voltage at gate electrodes of the first pull-down transistor and the third pull-down transistor, and a sixth pull-down transistor that is configured to maintain a low voltage at gate electrodes of the second pull-down transistor and the fourth pull-down transistor. The drive unit can reliably stabilize a voltage on a critical circuit node in a circuit.

Abstract: The invention provides a GOA circuit and driving method for foldable display panel and a foldable display panel. The GOA circuit comprises a plurality of cascaded GOA units and a switch module, the GOA units in folding area comprising a reset module; the reset module being for controlling GOA units in folding area to shut down pixels; the switch module having two ends connected respectively to last cascaded GOA unit in first active area and first cascaded GOA unit in second active area, for connecting an output end of the last cascaded GOA unit in the first active area to an input end of the first cascaded GOA unit in the second active area during folding, by using the last cascaded GOA unit in the first active area to output a gate control signal to control activation of the first cascaded GOA unit in the second active area.

Abstract: The invention provides a TFT substrate and manufacturing method thereof. The TFT substrate comprises: base substrate, TFT layer, passivation layer and pixel electrode, stacked in above order; wherein the pixel electrode comprising: main electrode, and connection electrode connected to main electrode; the connection electrode connected to TFT layer through pixel electrode via; main electrode having a cross-like slit structure with branch electrode on four trunks of cross, and the connection electrode comprising a plurality of parallel stripe-shaped first branch electrodes, and a second branch electrode connected to the first branch electrodes; by disposing the first branch electrodes, the connection electrode having a shape similar to main electrode to make the main and connection electrodes having similar single slit diffraction when exposed to reduce or eliminate the photo-resist thickness difference in pixel electrode area in the 3M process to avoid display defect and improve yield rate.

Abstract: The present invention discloses a display panel. The display panel, comprises a substrate. The substrate includes a plurality of display areas and a plurality of non-display areas surrounded by the display areas, wherein each of the display areas is divided into at least two sub display areas along a predetermined direction; a boundary between the sub-display areas is a straight line or a polyline; and a plurality of organic light emitting diodes is disposed in the sub-display areas; and a plurality of powerlines, disposed on the periphery of each of the sub-display areas, wherein the powerlines are located in the non-display areas; the powerlines on the periphery of display areas are independent from each other and a power voltage is applied on the organic light emitting diodes of each of the sub-display areas via the powerlines so that each of the organic light emitting diodes receives the same power voltage.

Abstract: A method for manufacturing a BOA liquid crystal display panel is provided. The BOA liquid crystal display panel is structured to have a TFT entirely located on a first black matrix and further, a second black matrix is arranged between the TFT and the passivation protection layer such that the second black matrix and the first black matrix completely enclose the TFT to block light emitting from a backlight module located under an array substrate in a direction toward an active layer and also to block reflecting light irradiating the active layer from lateral sides and a top side to better prevent light irradiating the active layer of the TFT for preventing photo leakage current, ensuring stable performance of the TFT device, and improving image displaying quality. The method helps overcome the issue of photo leakage current induced by backlighting irradiating the active layer of the TFT.

Abstract: The present invention discloses a display panel. The display panel, comprises a substrate. The substrate includes a plurality of display areas and a plurality of non-display areas surrounded by the display areas, wherein each of the display areas is divided into at least two sub display areas along a predetermined direction; a boundary between the sub-display areas is a straight line or a polyline; and a plurality of organic light emitting diodes is disposed in the sub-display areas; and a plurality of powerlines, disposed on the periphery of each of the sub-display areas, wherein the powerlines are located in the non-display areas; the powerlines on the periphery of display areas are independent from each other and a power voltage is applied on the organic light emitting diodes of each of the sub-display areas via the powerlines so that each of the organic light emitting diodes receives the same power voltage.

Abstract: The present disclosure relates to a thin film transistor (TFT) array substrate and a manufacturing method thereof. The manufacturing method includes adopting a shading metal layer to form the bottom gate electrode, depositing a buffer layer on the substrate having the bottom gate electrode, applying a patterned process on the buffer layer to reduce the thickness of the buffer layer on the bottom gate electrode, applying the patterned process on the semiconductor layer to form the semiconductor pattern corresponding to the bottom gate electrode within the thin area of the buffer layer. The present disclosure may reduce a thickness of the buffer layer corresponding to the bottom gate electrode, so as to improve the whole performance of the array substrate caused by the bottom gate electrode.

Abstract: This invention provides a flexible GOA display panel and a method of manufacturing the same. The flexible GOA display panel comprises a display area having at least one foldable region, multiple rows of pixel units disposed in the display area, and multiple GOA circuit units disposed in non-foldable regions on opposite sides of the display area, each of the GOA circuit units being used for driving pixel units in a corresponding row. All the GOA circuit units have a same height which is smaller than a pixel unit height, so that the distribution of the GOA circuit units can be away from the foldable region. Moreover, the resistances of the lines from the outputs of the GOA circuit units to the pixel units in corresponding rows are the same so as to reduce influence of the foldable region to the characteristic and reliability of the flexible GOA panel.

Abstract: Related to is the technical field of display panels, and in particular to a thin film transistor and a method for manufacturing the same. The thin film transistor provided on a substrate includes a drain, a source, a gate, and an active layer. The drain and the source are in a comb-like shape and are connected with the active layer through a first via hole and a second via hole, respectively. Such arrangement enables a width of a channel formed between the drain and the source to be increased and a layout scale of the thin film transistor to be reduced at the same time, whereby space is saved. When used in a GOA circuit or other circuits, the thin film transistor is helpful to achievement of a narrow-bezel design of a display panel.

Abstract: The present disclosure relates to a bidirectional shift register unit, a bidirectional shift register, and a display panel, wherein the bidirectional shift register unit includes: an pull-up circuit is configured to transform first clock signals into scanning signals outputting at a current level, an pull-up control circuit is configured with a forward pull-up sub-circuit and a backward pull-up sub-circuit respectively configured to pull up a potential of a control end of the pull-up circuit when a forward scanning process or a backward scanning process is conducted, a pull-down circuit and a pull-down maintaining circuit are respectively configured to pull down and continuously pull down the potential of the control end of the pull-up circuit and the scanning signals outputting at the current level during a pull-down phase. As such, a bidirectional scanning process may be achieved.

Abstract: The present disclosure relates to a scanning-driving circuit and a liquid crystal display (LCD). The scanning-driving circuit includes: a plurality of cascaded-connected gate driver on array (GOA) units. Each of the GOA units includes a pull-up circuit, a controlling circuit, a down-transfer circuit, a pull-down circuit, and a pull-down maintaining unit. The controlling circuit includes a first controlling circuit and a second controlling circuit. When conducting a forward scanning process, the first controlling circuit is configured to turn on the pull-up circuit upon the scanning process has started, and the second controlling circuit is configured to turn off the pull-up circuit upon the scanning process has finished. When conducting a backward scanning process, the second controlling circuit is configured to turn on the pull-up circuit upon the scanning process has started, and the first controlling circuit is configured to turn off the pull-up circuit upon the scanning process has finished.

Abstract: A scan driving circuit for OLED and a display panel are provided. The scan driving circuit for OLED comprising a plurality of scan driving units connected in cascade. The scan driving units at each stages for receiving the stage transmission signal at previous-stage, the first scan signal at previous-stage, the first scan signal at next-stage, the first clock signal and the second clock signal, and outputting a stage transmission signal at current-stage, the first scan signal at current-stage, the second scan signal at current-stage and the third scan signal at current-stage, wherein duty cycle of the first clock signal and the second clock signal are difference. The invention could generating three types shift scanning signal required for pixel compensation circuit and solved the problem of threshold voltage drift, then reducing difference brightness of display and enhancing display effect.

Abstract: A GOA circuit and a display device are provided. The GOA unit includes multiple GOA units, and each GOA unit includes a pull-up circuit for outputting a scanning driving signal of a current stage, a pull-down circuit including a first pull-down switch for pulling down the scanning driving signal of the current stage to a low voltage level, and a pull-down holding circuit including a first pull-down holding switch for holding the scanning driving signal of the current stage at a low voltage level. Each of the first pull-down switch and the first pull-down holding switch is a dual-gate TFT switch, a top gate electrode of each of the first pull-down switch and the first pull-down holding switch receives the first direct-current voltage. Accordingly, the present invention can reduce the current leakage, and increase the reliability of the entire GOA circuit.

Abstract: A complementary thin film transistor and manufacturing method thereof are provided. The complementary thin film transistor has a substrate, an n-type semiconductor layer, a p-type semiconductor layer, and an etched barrier layer. The substrate defines an n-type transistor region and a p-type transistor region adjacent to the n-type transistor region. The n-type semiconductor layer is disposed on the substrate and within the n-type transistor region, and has a metal oxide material. The p-type semiconductor layer is disposed on the substrate and within the p-type transistor region, and has an organic semiconductor material. The etched barrier layer is formed on the n-type semiconductor layer and disposed within the n-type transistor region and the p-type transistor region, and the p-type semiconductor layer is formed on the etched barrier layer.