Patents by Inventor Miao Jin

Miao Jin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240110900
    Abstract: A method for rapidly detecting pesticides based on thin-layer chromatography (TLC) and enzyme inhibition principles. The method includes the following steps: cutting a TLC plate into a rectangle, and using one end of the rectangle to contact a sample extract to form a pesticide residue separation area; covering the other end of the rectangle with a small piece cut from filter paper or glass fiber and fixing on a piece of enzyme inhibition reaction test paper to form a pesticide enrichment area; pasting a side of the enzyme inhibition reaction test paper away from the pesticide residue separation area with a piece of filter paper immobilized with a chromogenic agent to form a substrate color development area; and performing color reaction.
    Type: Application
    Filed: July 21, 2023
    Publication date: April 4, 2024
    Applicant: INSTITUTE OF QUALITY STANDARD AND TESTING TECHNOLOGY FOR AGRO-PRODUCTS, CAAS
    Inventors: Miao WANG, Jing WANG, Yunling SHAO, Yongxin SHE, Maojun JIN, Zhen CAO, Shanshan WANG, Lufei ZHENG, Hua SHAO, Fen JIN
  • Patent number: 11848369
    Abstract: Embodiments provide methods for forming nanowire structures, such as, for example, horizontal gate-all-around (hGAA) structures. In one embodiment, a method includes selectively etching material from a stack disposed on a material layer located on a substrate with a plasma to create recesses on each of first and second sides of the stack and depositing a dielectric material on the first and second sides. The stack includes repeating pairs of first and second layers. The method also includes removing the dielectric material from the first and second sides, where the dielectric material remains in the recesses of the first and second sides, and selectively depositing a stressor layer on regions of the first and second sides which are unprotected by the dielectric material to form gaps between the stressor layer and the dielectric material remaining in the recesses of the first and second sides.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: December 19, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Shiyu Sun, Nam Sung Kim, Bingxi Sun Wood, Naomi Yoshida, Sheng-Chin Kung, Miao Jin
  • Publication number: 20220173220
    Abstract: Embodiments provide methods for forming nanowire structures, such as, for example, horizontal gate-all-around (hGAA) structures. In one embodiment, a method includes selectively etching material from a stack disposed on a material layer located on a substrate with a plasma to create recesses on each of first and second sides of the stack and depositing a dielectric material on the first and second sides. The stack includes repeating pairs of first and second layers. The method also includes removing the dielectric material from the first and second sides, where the dielectric material remains in the recesses of the first and second sides, and selectively depositing a stressor layer on regions of the first and second sides which are unprotected by the dielectric material to form gaps between the stressor layer and the dielectric material remaining in the recesses of the first and second sides.
    Type: Application
    Filed: February 16, 2022
    Publication date: June 2, 2022
    Inventors: Shiyu SUN, Nam Sung KIM, Bingxi Sun WOOD, Naomi YOSHIDA, Sheng-Chin KUNG, Miao JIN
  • Patent number: 11282936
    Abstract: Embodiments provide apparatuses and methods for forming nanowire structures with desired materials horizontal gate-all-around (hGAA) structures field effect transistor (FET) for semiconductor chips. In one embodiments, a nanowire structure is provided and includes a stack containing repeating pairs of a first layer and a second layer and having a first side and a second side opposite from the first side, a gate structure surrounding the stack, a source layer adjacent to the first side, and a drain layer adjacent to the second side. The stack also contains one or more gaps disposed between the source layer and the second layer and having a dielectric constant value of about 1 and one or more gaps disposed between the drain layer and the second layer and having a dielectric constant value of about 1.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: March 22, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Shiyu Sun, Nam Sung Kim, Bingxi Sun Wood, Naomi Yoshida, Sheng-Chin Kung, Miao Jin
  • Publication number: 20200411656
    Abstract: Embodiments provide apparatuses and methods for forming nanowire structures with desired materials horizontal gate-all-around (hGAA) structures field effect transistor (FET) for semiconductor chips. In one embodiments, a nanowire structure is provided and includes a stack containing repeating pairs of a first layer and a second layer and having a first side and a second side opposite from the first side, a gate structure surrounding the stack, a source layer adjacent to the first side, and a drain layer adjacent to the second side. The stack also contains one or more gaps disposed between the source layer and the second layer and having a dielectric constant value of about 1 and one or more gaps disposed between the drain layer and the second layer and having a dielectric constant value of about 1.
    Type: Application
    Filed: September 14, 2020
    Publication date: December 31, 2020
    Inventors: Shiyu SUN, Nam Sung KIM, Bingxi Sun WOOD, Naomi YOSHIDA, Sheng-Chin KUNG, Miao JIN
  • Patent number: 10777650
    Abstract: The present disclosure provides an apparatus and methods for forming nanowire structures with desired materials horizontal gate-all-around (hGAA) structures field effect transistor (FET) for semiconductor chips. In one example, a method of forming nanowire structures includes depositing a dielectric material on a first side and a second side of a stack. The stack may include repeating pairs of a first layer and a second layer. The first side is opposite the second side and the first side and the second side have one or more recesses formed therein. The method includes removing the dielectric material from the first side and the second side of the stack. The dielectric material remains in the one or more recesses. The method includes the deposition of a stressor layer and the formation of one or more side gaps between the stressor layer and the first side and the second side of the stack.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: September 15, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Shiyu Sun, Nam Sung Kim, Bingxi Sun Wood, Naomi Yoshida, Sheng-Chin Kung, Miao Jin
  • Publication number: 20170309719
    Abstract: The present disclosure provides an apparatus and methods for forming nanowire structures with desired materials horizontal gate-all-around (hGAA) structures field effect transistor (FET) for semiconductor chips. In one example, a method of forming nanowire structures includes depositing a dielectric material on a first side and a second side of a stack. The stack may include repeating pairs of a first layer and a second layer. The first side is opposite the second side and the first side and the second side have one or more recesses formed therein. The method includes removing the dielectric material from the first side and the second side of the stack. The dielectric material remains in the one or more recesses. The method includes the deposition of a stressor layer and the formation of one or more side gaps between the stressor layer and the first side and the second side of the stack.
    Type: Application
    Filed: April 24, 2017
    Publication date: October 26, 2017
    Inventors: Shiyu SUN, Nam Sung KIM, Bingxi Sun WOOD, Naomi YOSHIDA, Sheng-Chin KUNG, Miao JIN
  • Patent number: 8652951
    Abstract: Methods and apparatus for forming a germanium containing film on a patterned substrate are described. The patterned substrate is a silicon, or silicon containing material, and may have a mask material formed on a surface thereof. The germanium containing material is formed selectively on exposed silicon in the recesses of the substrate, and an overburden of at least 50% is formed on the substrate. The germanium containing layer is thermally treated using pulsed laser radiation, which melts a portion of the overburden, but does not melt the germanium containing material in the recesses. The germanium containing material in the recesses is typically annealed, at least in part, by the thermal treatment. The overburden is then removed.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: February 18, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Yi-Chiau Huang, Jiping Li, Miao Jin, Bingxi Sun Wood, Errol Antonio C. Sanchez, Yihwan Kim
  • Publication number: 20130210221
    Abstract: Methods and apparatus for forming a germanium containing film on a patterned substrate are described. The patterned substrate is a silicon, or silicon containing material, and may have a mask material formed on a surface thereof. The germanium containing material is formed selectively on exposed silicon in the recesses of the substrate, and an overburden of at least 50% is formed on the substrate. The germanium containing layer is thermally treated using pulsed laser radiation, which melts a portion of the overburden, but does not melt the germanium containing material in the recesses. The germanium containing material in the recesses is typically annealed, at least in part, by the thermal treatment. The overburden is then removed.
    Type: Application
    Filed: February 13, 2013
    Publication date: August 15, 2013
    Inventors: YI-CHIAU HUANG, Jiping Li, Miao Jin, Bingxi Sun Wood, Errol Antonio C. Sanchez, Yihwan Kim
  • Publication number: 20100203391
    Abstract: A mesoporous carbon material formed on an electrode surface in an energy storage device, and a method of forming the same are disclosed. The mesoporous carbon material acts as a high surface area ion intercalation medium for the energy storage device, and is made up of CVD-deposited carbon fullerene “onions” and carbon nanotubes (CNTs) that are interconnected in a fullerene/CNT hybrid matrix. The fullerene/CNT hybrid matrix is a high porosity material that is capable of retaining lithium ions in concentrations useful for storing significant quantities of electrical energy. The method, according to one embodiment, includes vaporizing a high molecular weight hydrocarbon precursor and directing the vapor onto a conductive substrate to form a mesoporous carbon material thereon.
    Type: Application
    Filed: January 29, 2010
    Publication date: August 12, 2010
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Sergey D. Lopatin, Robert Z. Bachrach, Dmitri A. Brevnov, Christopher Lazik, Miao Jin, Yuri S. Uritsky