Patents by Inventor Miaosong Wu

Miaosong Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230078732
    Abstract: A battery charging apparatus includes a first switch, a second switch, a third switch and a fourth switch connected in series between an input voltage bus and ground, wherein a common node of the second switch and the third switch is configured to be coupled to a battery, a flying capacitor connected between a common node of the first switch and the second switch, and a common node of the third switch and the fourth switch, and a controller configured to generate gate drive signals for configuring at least one switch of the first switch and the second switch as a linear regulator during a charging process of the battery.
    Type: Application
    Filed: October 12, 2021
    Publication date: March 16, 2023
    Inventors: Cheng Liu, Fuchun Zhan, Miaosong Wu
  • Patent number: 11509146
    Abstract: A battery charging apparatus includes a first converter having an input coupled to an input voltage bus and an output coupled to a first battery, and a second converter having an input coupled to the input voltage bus and an output coupled to the first battery and a second battery through a first bidirectional current blocking switch and a second bidirectional current blocking switch, respectively.
    Type: Grant
    Filed: July 6, 2022
    Date of Patent: November 22, 2022
    Assignee: NuVolta Technologies (Hefei) Co., Ltd.
    Inventors: Junhe Zhang, Fuchun Zhan, Miaosong Wu
  • Patent number: 8928378
    Abstract: In accordance with an embodiment, an integrated circuit comprises a master-slave flip-flop, a selection logic circuit, and a pass structure. The selection logic circuit is configured to selectively enable or disable one or more clock signals. The pass structure is configured to pass a data signal to the master-slave flip-flop in response to a selected clock signal being enabled.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: January 6, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Miaosong Wu
  • Publication number: 20110234283
    Abstract: In accordance with an embodiment, an integrated circuit comprises a master-slave flip-flop, a selection logic circuit, and a pass structure. The selection logic circuit is configured to selectively enable or disable one or more clock signals. The pass structure is configured to pass a data signal to the master-slave flip-flop in response to a selected clock signal being enabled.
    Type: Application
    Filed: April 30, 2010
    Publication date: September 29, 2011
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Miaosong Wu