Patents by Inventor Miau Shing Tsai

Miau Shing Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11699596
    Abstract: In an embodiment, a method includes: receiving, within a processing chamber, a wafer with a photoresist mask above a metal layer, wherein the processing chamber is connected to a gas source; applying an etchant configured to etch the metal layer in accordance with the photoresist mask within the processing chamber; and applying gas from the gas source to perform plasma ashing in the processing chamber.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: July 11, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsing-Hsiang Wang, Yu-Hsiang Lin, Wei-Da Chen, Tom Peng, P. Y. Chiu, Miau-Shing Tsai, Cheng-Yi Huang, Ching-Horng Chen
  • Publication number: 20220336228
    Abstract: An apparatus for perform metal etching and plasma ashing includes: a processing chamber having an enclosed area; an electrostatic chuck disposed in the enclosed area and configured to secure a wafer, the electrostatic chuck connected with a bias power; at least one coil connected with a source power; a etchant conduit configured provide an etchant to a metal of the wafer within the processing chamber in accordance with a photoresist mask of the wafer; and a gas intake conduit connected with a gas source, wherein the gas intake conduit is configured to supply the processing chamber with a gas from the gas source during performance of plasma ashing within the processing chamber.
    Type: Application
    Filed: June 30, 2022
    Publication date: October 20, 2022
    Inventors: Hsing-Hsiang WANG, Yu-Hsiang Lin, Wei-Da Chen, Tom Peng, P.Y. Chiu, Miau-Shing Tsai, Cheng-Yi Huang, Ching-Horng Chen
  • Publication number: 20200176269
    Abstract: In an embodiment, a method includes: receiving, within a processing chamber, a wafer with a photoresist mask above a metal layer, wherein the processing chamber is connected to a gas source; applying an etchant configured to etch the metal layer in accordance with the photoresist mask within the processing chamber; and applying gas from the gas source to perform plasma ashing in the processing chamber.
    Type: Application
    Filed: November 14, 2019
    Publication date: June 4, 2020
    Inventors: Hsing-Hsiang WANG, Yu-Hsiang LIN, Wei-Da CHEN, Tom PENG, P.Y CHIU, Miau-Shing TSAI, Cheng-Yi HUANG, Ching-Horng CHEN
  • Publication number: 20110086444
    Abstract: The present disclosure provides a method for making an integrated circuit. The method comprises processing a first surface of a substrate to create the integrated circuit and grinding a second surface of the substrate to remove material until the substrate is substantially close to a desire thickness. The method also includes performing a wet etch process over the second surface of the substrate and performing a chemical mechanical polishing (CMP) process over the second surface of the substrate to remove a pattern on the substrate. The second surface of the substrate is examined with a metrological instrument to determine if the second surface is substantially smooth; if the second surface is not substantially smooth, the steps of performing the CMP process and examining the second surface with the metrological instrument are repeated until the second surface is substantially smooth.
    Type: Application
    Filed: October 14, 2009
    Publication date: April 14, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Chih Weng, Miau Shing Tsai, Hsun-Ying Huang