Patents by Inventor Micael-Lacson Magpayo

Micael-Lacson Magpayo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11838525
    Abstract: Image compression circuitry comprises first-stage compression circuitry, first-stage selector circuitry, second-stage compression circuitry, and second-stage selector circuitry. The first-stage compression circuitry is configured to sequentially receive a plurality of input blocks each comprising pixel data of a plurality of pixels, generate a plurality of first-stage compressed blocks by compressing the plurality of input blocks, and generate a plurality of first-stage decompressed blocks. The first-stage selector circuitry is configured to select first-stage-selected decompressed blocks from among the plurality of first-stage decompressed blocks and select first-stage-selected compressed blocks corresponding to the first-stage-selected decompressed blocks from among the plurality of first-stage compressed blocks.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: December 5, 2023
    Assignee: Synaptics Incorporated
    Inventors: Micael Lacson Magpayo, Hirobumi Furihata, Takashi Nose
  • Publication number: 20220329838
    Abstract: Image compression circuitry comprises first-stage compression circuitry, first-stage selector circuitry, second-stage compression circuitry, and second-stage selector circuitry. The first-stage compression circuitry is configured to sequentially receive a plurality of input blocks each comprising pixel data of a plurality of pixels, generate a plurality of first-stage compressed blocks by compressing the plurality of input blocks, and generate a plurality of first-stage decompressed blocks. The first-stage selector circuitry is configured to select first-stage-selected decompressed blocks from among the plurality of first-stage decompressed blocks and select first-stage-selected compressed blocks corresponding to the first-stage-selected decompressed blocks from among the plurality of first-stage compressed blocks.
    Type: Application
    Filed: June 28, 2022
    Publication date: October 13, 2022
    Applicant: Synaptics Incorporated
    Inventors: Micael Lacson Magpayo, Hirobumi Furihata, Takashi Nose
  • Patent number: 11418801
    Abstract: Image compression circuitry comprises first-stage compression circuitry, first-stage selector circuitry, second-stage compression circuitry, and second-stage selector circuitry. The first-stage compression circuitry is configured to sequentially receive a plurality of input blocks each comprising pixel data of a plurality of pixels, generate a plurality of first-stage compressed blocks by compressing the plurality of input blocks, and generate a plurality of first-stage decompressed blocks. The first-stage selector circuitry is configured to select first-stage-selected decompressed blocks from among the plurality of first-stage decompressed blocks and select first-stage-selected compressed blocks corresponding to the first-stage-selected decompressed blocks from among the plurality of first-stage compressed blocks.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: August 16, 2022
    Assignee: Synaptics Incorporated
    Inventors: Micael Lacson Magpayo, Hirobumi Furihata, Takashi Nose
  • Publication number: 20200112732
    Abstract: Image compression circuitry comprises first-stage compression circuitry, first-stage selector circuitry, second-stage compression circuitry, and second-stage selector circuitry. The first-stage compression circuitry is configured to sequentially receive a plurality of input blocks each comprising pixel data of a plurality of pixels, generate a plurality of first-stage compressed blocks by compressing the plurality of input blocks, and generate a plurality of first-stage decompressed blocks. The first-stage selector circuitry is configured to select first-stage-selected decompressed blocks from among the plurality of first-stage decompressed blocks and select first-stage-selected compressed blocks corresponding to the first-stage-selected decompressed blocks from among the plurality of first-stage compressed blocks.
    Type: Application
    Filed: October 1, 2019
    Publication date: April 9, 2020
    Inventors: Micael Lacson MAGPAYO, Hirobumi FURIHATA, Takashi NOSE
  • Patent number: 8649737
    Abstract: To enable addition or changes of functions with changes of communication standards in a mobile communication terminal test system. A mobile communication terminal test system includes a transceiver which has a control unit configured to append input information to acquired waveform data, a signal analysis unit which executes an analysis program, and a signal analyzer which is provided separately from the transceiver. The analysis program has a processing program which is provided for each type of arithmetic processing on the waveform data, a control program which is provided for each communication system, selects one or more processing programs for each test item, and executes the processing programs, and a switching program which specifies a communication system and a test item on the basis of the input information, and selects and executes a control program.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: February 11, 2014
    Assignee: Anritsu Corporation
    Inventors: Yoshitaka Kihara, Micael-Lacson Magpayo, Naofumi Naruse
  • Publication number: 20120252372
    Abstract: To enable addition or changes of functions with changes of communication standards in a mobile communication terminal test system. A mobile communication terminal test system includes a transceiver which has a control unit configured to append input information to acquired waveform data, a signal analysis unit which executes an analysis program, and a signal analyzer which is provided separately from the transceiver. The analysis program has a processing program which is provided for each type of arithmetic processing on the waveform data, a control program which is provided for each communication system, selects one or more processing programs for each test item, and executes the processing programs, and a switching program which specifies a communication system and a test item on the basis of the input information, and selects and executes a control program.
    Type: Application
    Filed: February 29, 2012
    Publication date: October 4, 2012
    Applicant: ANRITSU CORPORATION
    Inventors: Yoshitaka Kihara, Micael-Lacson Magpayo, Naofumi Naruse