Patents by Inventor Micah Barany

Micah Barany has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Processor power monitoring and control with dynamic load balancing
    Patent number: 10146287
    Abstract: Apparatus and methods may provide for subscribing a thread to a resource monitor through a machine specific register and subscribing the thread to a class of service through the machine specific register. The resource monitor or the class of service for the thread may be changed without interrupting the thread. The power allocated to the processor core may be changed based on the selected class of service for the thread.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: December 4, 2018
    Assignee: Intel Corporation
    Inventors: Federico Ardanaz, Ian M. Steiner, Jonathan M. Eastep, Richard J. Greco, Krishnakanth V. Sistla, Micah Barany, Andrew J. Herdrich
  • PROCESSOR POWER MONITORING AND CONTROL WITH DYNAMIC LOAD BALANCING
    Publication number: 20170285710
    Abstract: Apparatus and methods may provide for subscribing a thread to a resource monitor through a machine specific register and subscribing the thread to a class of service through the machine specific register. The resource monitor or the class of service for the thread may be changed without interrupting the thread. The power allocated to the processor core may be changed based on the selected class of service for the thread.
    Type: Application
    Filed: April 1, 2016
    Publication date: October 5, 2017
    Applicant: Intel Corporation
    Inventors: Federico Ardanaz, Ian M. Steiner, Jonathan M. Eastep, Richard J. Greco, Krishnakanth V. Sistla, Micah Barany, Andrew J. Herdrich
  • Low power operation mechanism and method
    Patent number: 6650171
    Abstract: An apparatus and method are provided for powering a chip having at least one transistor. A voltage regulating device may apply a first voltage and a second voltage to the transistor. The voltage regulating device may include a mechanism to apply a third voltage to a body contact of the transistor while applying the first voltage to the transistor. This places the transistor in a reverse body bias mode which conserves energy by reducing leakage current.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: November 18, 2003
    Assignee: Intel Corporation
    Inventors: Kevin X. Zhang, Micah Barany, Krishnan Ravichandran, Bob Jackson
  • Low power operation mechanism and method
    Publication number: 20030038668
    Abstract: An apparatus and method are provided for powering a chip having at least one transistor. A voltage regulating device may apply a first voltage and a second voltage to the transistor. The voltage regulating device may include a mechanism to apply a third voltage to a body contact of the transistor while applying the first voltage to the transistor. This places the transistor in a reverse body bias mode which conserves energy by reducing leakage current.
    Type: Application
    Filed: October 15, 2002
    Publication date: February 27, 2003
    Inventors: Kevin X. Zhang, Micah Barany, Krishnan Ravichandran, Bob Jackson
  • Low power operation mechanism and method
    Patent number: 6483375
    Abstract: An apparatus and method are provided for powering a chip having at least one transistor. A voltage regulating device may apply a first voltage and a second voltage to the transistor. The voltage regulating device may include a mechanism to apply a third voltage to a body contact of the transistor while applying the first voltage to the transistor. This places the transistor in a reverse body bias mode which conserves energy by reducing leakage current.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: November 19, 2002
    Assignee: Intel Corporation
    Inventors: Kevin X. Zhang, Micah Barany, Krishnan Ravichandran, Bob Jackson