Abstract: A data processing apparatus for summing data values includes: a plurality of adder logic stages arranged in parallel; a control logic, in response to a request to sum two data values, to forward portions of the two data values to respective ones of the plurality of adder logic stages, each of the plurality of adder logic stages performing a carry propagate addition of the received portions to generate an intermediate sum, a propagate value and a carry; and further logic stages for combining the intermediate sums, carries and propagate values to produce a sum of the two data values. The control logic, further in response to a request to add a third data value to the sum before the further logic has completed sum, forwards portions of the third data value to respective ones of the plurality of adder logic stages, feedbacks the intermediate sums, and selectively feedbacks a carry generated from a preceding adder logic stage.

Abstract: A method and apparatus for generating a plurality of concurrent significant bits forming at least a portion of a product from at least two partial products, the method comprising the following steps: for each of a plurality of said concurrent predetermined significant bits performing steps (i) to (iii): (i) performing an addition of bits of a predetermined significance from each of said plurality of partial products having a bit of said predetermined significance; (ii) forming an intermediate sum of said predetermined significance from the least significant bit of said additions; (iii) forming at least one intermediate carry of a higher significance from said higher significant bits of said sum; and detecting if said partial products are formed from integers or polynomials; and outputting said plurality of intermediate sum bits formed during steps (i) to (iii) as a plurality of product bits of corresponding significance in response to detection of polynomials; or combining said intermediate carrys and said in