Patents by Inventor Micah VILLMOW

Micah VILLMOW has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200210805
    Abstract: A neural network is a collection of interconnected nodes, where each of the nodes processes input data and outputs a result of the processing to any other nodes connected to it. The neural network is typically composed of various layers that perform different processing tasks on their inputs. Systems, methods, and computer program products are provided for generating one or more functional layers in a neural network.
    Type: Application
    Filed: December 31, 2018
    Publication date: July 2, 2020
    Inventors: Marek Drozdowski, Micah Villmow
  • Publication number: 20190370038
    Abstract: An apparatus and method for providing support for execution of optimized code. The apparatus includes a processor that is configured to convert guest code to native code and monitor access to an indicated memory address range associated with a read-only portion of the memory and to detect access to the indicated memory address range. The processor is further configured to raise an exception in response to memory access to the indicated memory address range and determine an access property of the indicated memory address range.
    Type: Application
    Filed: July 24, 2017
    Publication date: December 5, 2019
    Inventors: Micah VILLMOW, Kevin LAWTON, Ravishankar RAO, Mohammad A. ABDALLAH
  • Publication number: 20190155603
    Abstract: System and method for multiplexing vector comparison. The system and method access a first vector having a vector length. The first vector includes a plurality of vector portions having a vector portion length. In addition, the method accesses a second vector of the vector length. The second vector includes the same quantity of vector portions as the plurality of vector portions, and the vector portions of the second vector are of the vector portion length. The method further includes performing a comparison of each of the plurality of vector portions of the first vector to each of the plurality of vector portions of the second vector and storing a result of the comparing in a third vector with at least one bit of the third vector corresponding to each comparison of the vector portions.
    Type: Application
    Filed: July 24, 2017
    Publication date: May 23, 2019
    Inventors: Micah VILLMOW, Mohammad A. ABDALLAH