Patents by Inventor Michael A. Gribelyuk

Michael A. Gribelyuk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250228140
    Abstract: The present disclosure generally relates to topological semi-metal (TSM) and topological insulator (TI) based spin-orbit torque (SOT) devices and a method of forming thereof. TI or TSM-based SOT device (such as that with BiSb in the SOT layer) has been proposed for applications in magnetic switching and sensor applications, where current flows in a CIP (current-in-plane) or CPP (current-perpendicular-to-the-plane) direction, respectively. For CPP SOT devices, the requirement for the TI or TSM layer's bulk property is to be more insulating, to minimize shunting. However, for CIP SOT devices, the requirement for the TI or TSM layer's bulk property is to be more conductive, for less power consumption. Disclosed herein are various embodiments covering types and amounts of dopants for the TI or TSM layer, to decrease the bandgap of the TI or TSM layer for CIP SOT devices, thereby increasing the bulk conductivity for lower power consumption.
    Type: Application
    Filed: January 6, 2025
    Publication date: July 10, 2025
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Brian R. YORK, Xiaoyong LIU, Son T. LE, Michael A. GRIBELYUK, Hisashi TAKANO
  • Publication number: 20250226140
    Abstract: Nitrogen doping an insulating layer can lower the bandgap of a magnetic storage device. It is challenging to nitrogen dope magnesium oxide (MgO). A cation can be added to allow the magnesium to hold onto the nitrogen dopant without highly oxidizing or nitriding the cation. The resulting nitrogen doped MgXO, where X is the cation, has a lower bandgap compared to a much similar barrier layer that has neither nitrogen nor a cation thus improving thermal and electrical reliabilities. The nitrogen doped MgXO is non-stoichiometric whereas comparably, an oxynitride is stoichiometric. Example cations that may be used include aluminum, titanium, vanadium, chromium, and scandium.
    Type: Application
    Filed: January 9, 2024
    Publication date: July 10, 2025
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Brian R. YORK, Andrew CHEN, Jinming LIU, Alan SPOOL, Son T. LE, Xiaoyong LIU, Michael A. GRIBELYUK, Hisashi TAKANO, Xing-Cai GUO
  • Publication number: 20250218456
    Abstract: Magnetic moments can be increased in hard disk drive (HDD) shields and ferromagnetic layers to minimize magnetic saturation while still maintaining low magnetic coercivity (Hc) and high saturated magnetic flux (Bs). A textured layer can be used to induce nucleation and growth of an interfacial nature such that body centered cubic (BCC) ferromagnetic materials with high Bs and low Hc are obtained while also increasing the magnetic moment. The textured layer will cause the ferromagnetic material to grow with low Hc regardless of the crystallographic orientation.
    Type: Application
    Filed: December 27, 2023
    Publication date: July 3, 2025
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Brian R. YORK, Xiaoyong LIU, Jinming LIU, Son T. LE, Michael A. GRIBELYUK, Susumu OKAMURA, Hisashi TAKANO
  • Publication number: 20250218457
    Abstract: Magnetic moments can be increased in hard disk drive (HDD) shields and ferromagnetic layers to minimize magnetic saturation while still maintaining low magnetic coercivity (Hc) and high saturated magnetic flux (Bs). A textured layer can be used to induce nucleation and growth of an interfacial nature such that body centered cubic (BCC) ferromagnetic materials with high Bs and low Hc are obtained while also increasing the magnetic moment. The textured layer will cause the ferromagnetic material to grow with low Hc regardless of the crystallographic orientation.
    Type: Application
    Filed: December 27, 2023
    Publication date: July 3, 2025
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Brian R. YORK, Xiaoyong LIU, Jinming LIU, Son T. LE, Michael A. GRIBELYUK, Susumu OKAMURA, Hisashi TAKANO
  • Publication number: 20250054671
    Abstract: The present disclosure generally relates to spin-orbit torque (SOT) device comprising a first bismuth antimony (BiSb) layer having a (001) orientation. The SOT device comprises a first BiSb layer having a (001) orientation and a second BiSb layer having a (012) orientation. The first BiSb layer having a (001) orientation is formed by depositing an amorphous material selected from the group consisting of: B, Al, Si, SiN, Mg, Ti, Sc, V, Cr, Mn, Y, Zr, Nb, AlN, C, Ge, and combinations thereof, on a substrate, exposing the amorphous material to form an amorphous oxide surface on the amorphous material, and depositing the first BiSb layer on the amorphous oxide surface. By utilizing a first BiSb layer having a (001) orientation and a second BiSb having a (012) orientation, the signal through the SOT device is balanced and optimized to match through both the first and second BiSb layers.
    Type: Application
    Filed: October 31, 2024
    Publication date: February 13, 2025
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Brian R. YORK, Cherngye HWANG, Xiaoyong LIU, Michael A. GRIBELYUK, Xiaoyu XU, Randy G. SIMMONS, Kuok San HO, Hisashi TAKANO
  • Publication number: 20250014618
    Abstract: The present disclosure generally relates to spin-orbit torque (SOT) magnetic tunnel junction (MTJ) devices comprising a doped bismuth antimony (BiSbE) layer having a (012) orientation. The devices may include magnetic write heads, read heads, or MRAM devices. The dopant in the BiSbE layer enhances the (012) orientation. The BiSbE layer may be formed on a texturing layer to ensure the (012) orientation, and a migration barrier may be formed over the BiSbE layer to ensure the antimony does not migrate through the structure and contaminate other layers. A buffer layer and interlayer may also be present. The buffer layer and the interlayer may each independently be a single layer of material or a multilayer of material. The buffer layer and the interlayer inhibit antimony (Sb) migration within the doped BiSbE layer and enhance uniformity of the doped BiSbE layer while further promoting the (012) orientation of the doped BiSbE layer.
    Type: Application
    Filed: September 19, 2024
    Publication date: January 9, 2025
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Cherngye HWANG, Brian R. YORK, Randy G. SIMMONS, Xiaoyong LIU, Kuok San HO, Hisashi TAKANO, Michael A. GRIBELYUK, Xiaoyu XU
  • Patent number: 12176132
    Abstract: The present disclosure generally relates to spin-orbit torque (SOT) device comprising a first bismuth antimony (BiSb) layer having a (001) orientation. The SOT device comprises a first BiSb layer having a (001) orientation and a second BiSb layer having a (012) orientation. The first BiSb layer having a (001) orientation is formed by depositing an amorphous material selected from the group consisting of: B, Al, Si, SiN, Mg, Ti, Sc, V, Cr, Mn, Y, Zr, Nb, AlN, C, Ge, and combinations thereof, on a substrate, exposing the amorphous material to form an amorphous oxide surface on the amorphous material, and depositing the first BiSb layer on the amorphous oxide surface. By utilizing a first BiSb layer having a (001) orientation and a second BiSb having a (012) orientation, the signal through the SOT device is balanced and optimized to match through both the first and second BiSb layers.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: December 24, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Quang Le, Brian R. York, Cherngye Hwang, Xiaoyong Liu, Michael A. Gribelyuk, Xiaoyu Xu, Randy G. Simmons, Kuok San Ho, Hisashi Takano
  • Publication number: 20240412759
    Abstract: The present disclosure generally relates to spin-orbit torque (SOT) device comprising a bismuth antimony (BiSb) layer. The SOT device comprises a seed layer and a BiSb layer having a (012) orientation. The seed layer comprises at least one of an amorphous/nanocrystalline material with a nearest neighbor x-ray diffraction peak with a d-spacing in the range of about 2.02 ? to about 2.20 ?; a polycrystalline material having a (111) orientation and an a-axis of about 3.53 ? to about 3.81 ?; and a polycrystalline material having a cubic (100) or tetragonal (001) orientation and an a-axis of about 4.1 ? to about 4.7 ?. When the seed layer comprises an amorphous material or a polycrystalline material having a (111), the BiSb layer is doped, and the seed layer has a lower a/c ratio than when the seed layer comprises polycrystalline material having a cubic (100) or tetragonal (001) orientation.
    Type: Application
    Filed: August 3, 2023
    Publication date: December 12, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Brian R. YORK, Cherngye HWANG, Xiaoyong LIU, Michael A. GRIBELYUK, Son T. LE, Hisashi TAKANO
  • Patent number: 12125512
    Abstract: The present disclosure generally relates to spin-orbit torque (SOT) magnetic tunnel junction (MTJ) devices comprising a doped bismuth antimony (BiSbE) layer having a (012) orientation. The devices may include magnetic write heads, read heads, or MRAM devices. The dopant in the BiSbE layer enhances the (012) orientation. The BiSbE layer may be formed on a texturing layer to ensure the (012) orientation, and a migration barrier may be formed over the BiSbE layer to ensure the antimony does not migrate through the structure and contaminate other layers. A buffer layer and interlayer may also be present. The buffer layer and the interlayer may each independently be a single layer of material or a multilayer of material. The buffer layer and the interlayer inhibit antimony (Sb) migration within the doped BiSbE layer and enhance uniformity of the doped BiSbE layer while further promoting the (012) orientation of the doped BiSbE layer.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: October 22, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Quang Le, Cherngye Hwang, Brian R. York, Randy G. Simmons, Xiaoyong Liu, Kuok San Ho, Hisashi Takano, Michael A. Gribelyuk, Xiaoyu Xu
  • Patent number: 12106791
    Abstract: The present disclosure generally relates to spin-orbit torque (SOT) devices comprising a bismuth antimony (BiSb) layer. The SOT devices further comprise one or more GeXNiFe layers, where at least one GeXNiFe layer is disposed in contact with the BiSb layer. The GeXNiFe layer has a thickness less than or equal to about 15 ? when used as an interlayer on top of the BiSb layer or less than or equal to 40 ? when used as a buffer layer underneath the BiSb. When the BiSb layer is doped with a dopant comprising a gas, a metal, a non-metal, or a ceramic material, the GeXNiFe layer promotes the BiSb layer to have a (012) orientation. When the BiSb layer is undoped, the GeXNiFe layer promotes the BiSb layer to have a (001) orientation. Utilizing the GeXNiFe layer allows the crystal orientation of the BiSb layer to be selected.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: October 1, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Quang Le, Brian R. York, Cherngye Hwang, Xiaoyong Liu, Michael A. Gribelyuk, Xiaoyu Xu, Susumu Okamura, Kuok San Ho, Hisashi Takano, Randy G. Simmons
  • Publication number: 20240032437
    Abstract: The present disclosure generally relates to spin-orbit torque (SOT) devices comprising a bismuth antimony (BiSb) layer. The SOT devices further comprises a nonmagnetic buffer layer, a nonmagnetic interlayer, a ferromagnetic layer, and a nonmagnetic barrier layer. One or more of the barrier layer, interlayer, and buffer layer comprise a polycrystalline non-Heusler alloy material, or a Heusler alloy and a material selected from the group consisting of: Cu, Ag, Ge, Mn, Ni, Co, Mo, W, Sn, B, and In. The Heusler alloy is a full Heusler alloy comprising X2YZ or a half Heusler alloy comprising XYZ, where X is one of: Mn, Fe, Co, Ni, Cu, Ru, Rh, Pd, Ag, Ir, Pt, and Au, Y is one of: Ti, V, Cr, Mn, Fe, Co, Ni, Zn, Y, Zr, Nb, Mo, Hf, and W, and Z is one of: B, Al, Si, Ga, Ge, As, In, Sn, Sb, and Bi.
    Type: Application
    Filed: May 15, 2023
    Publication date: January 25, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Brian R. YORK, Cherngye HWANG, Xiaoyong LIU, Susumu OKAMURA, Michael A. GRIBELYUK, Xiaoyu XU, Randy G. SIMMONS, Kuok San HO, Hisashi TAKANO
  • Patent number: 11875827
    Abstract: The present disclosure generally relate to spin-orbit torque (SOT) devices. The SOT devices each comprise a non-magnetic layer, a free layer disposed in contact with the non-magnetic layer, and a bismuth antimony (BiSb) layer disposed over the free layer. The non-magnetic layer has a thickness of about 0.5 nm to about 2 nm. The BiSb layer has a thickness of about 5 nm to about 10 nm. The BiSb layer and the free layer have collective thickness between about 5 nm to about 20 nm. By reducing the thickness of the non-magnetic layer and BiSb layer, a read gap of each SOT device is reduced while enabling large inverse spin Hall angles and high signal-to-noise ratios.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: January 16, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Quang Le, Brian R. York, Xiaoyong Liu, Son T. Le, Cherngye Hwang, Michael A. Gribelyuk, Xiaoyu Xu, Kuok San Ho, Hisashi Takano, Julian Sasaki, Huy H. Ho, Khang H. D. Nguyen, Nam Hai Pham
  • Publication number: 20240006109
    Abstract: The present disclosure generally relates to spin-orbit torque (SOT) device comprising a first bismuth antimony (BiSb) layer having a (001) orientation. The SOT device comprises a first BiSb layer having a (001) orientation and a second BiSb layer having a (012) orientation. The first BiSb layer having a (001) orientation is formed by depositing an amorphous material selected from the group consisting of: B, Al, Si, SiN, Mg, Ti, Sc, V, Cr, Mn, Y, Zr, Nb, AlN, C, Ge, and combinations thereof, on a substrate, exposing the amorphous material to form an amorphous oxide surface on the amorphous material, and depositing the first BiSb layer on the amorphous oxide surface. By utilizing a first BiSb layer having a (001) orientation and a second BiSb having a (012) orientation, the signal through the SOT device is balanced and optimized to match through both the first and second BiSb layers.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 4, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Brian R. YORK, Cherngye HWANG, Xiaoyong LIU, Michael A. GRIBELYUK, Xiaoyu XU, Randy G. SIMMONS, Kuok San HO, Hisashi TAKANO
  • Publication number: 20240005973
    Abstract: The present disclosure generally relates to spin-orbit torque (SOT) devices comprising a bismuth antimony (BiSb) layer. The SOT devices further comprise one or more GexNiFe layers, where at least one GexNiFe layer is disposed in contact with the BiSb layer. The GexNiFe layer has a thickness less than or equal to about 15 ? when used as an interlayer on top of the BiSb layer or less than or equal to 40 ? when used as a buffer layer underneath the BiSb. When the BiSb layer is doped with a dopant comprising a gas, a metal, a non-metal, or a ceramic material, the GexNiFe layer promotes the BiSb layer to have a (012) orientation. When the BiSb layer is undoped, the GexNiFe layer promotes the BiSb layer to have a (001) orientation. Utilizing the GexNiFe layer allows the crystal orientation of the BiSb layer to be selected.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 4, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Brian R. YORK, Cherngye HWANG, Xiaoyong LIU, Michael A. GRIBELYUK, Xiaoyu XU, Susumu OKAMURA, Kuok San HO, Hisashi TAKANO, Randy G. SIMMONS
  • Publication number: 20230386721
    Abstract: The present disclosure generally relate to spin-orbit torque (SOT) magnetic tunnel junction (MTJ) devices comprising a buffer layer, a bismuth antimony (BiSb) layer having a (012) orientation disposed on the buffer layer, and an interlayer disposed on the BiSb layer. The buffer layer and the interlayer may each independently be a single layer of material or a multilayer of material. The buffer layer and the interlayer each comprise at least one of a covalently bonded amorphous material, a tetragonal (001) material, a tetragonal (110) material, a body-centered cubic (bcc) (100) material, a face-centered cubic (fcc) (100) material, a textured bcc (100) material, a textured fcc (100) material, a textured (100) material, or an amorphous metallic material. The buffer layer and the interlayer inhibit antimony (Sb) migration within the BiSb layer and enhance uniformity of the BiSb layer while further promoting the (012) orientation of the BiSb layer.
    Type: Application
    Filed: August 9, 2023
    Publication date: November 30, 2023
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Brian R. YORK, Cherngye HWANG, Susumu OKAMURA, Michael A. GRIBELYUK, Xiaoyong LIU, Kuok San HO, Hisashi TAKANO
  • Publication number: 20230306993
    Abstract: The present disclosure generally relate to spin-orbit torque (SOT) devices. The SOT devices each comprise a non-magnetic layer, a free layer disposed in contact with the non-magnetic layer, and a bismuth antimony (BiSb) layer disposed over the free layer. The non-magnetic layer has a thickness of about 0.5 nm to about 2 nm. The BiSb layer has a thickness of about 5 nm to about 10 nm. The BiSb layer and the free layer have collective thickness between about 5 nm to about 20 nm. By reducing the thickness of the non-magnetic layer and BiSb layer, a read gap of each SOT device is reduced while enabling large inverse spin Hall angles and high signal-to-noise ratios.
    Type: Application
    Filed: March 25, 2022
    Publication date: September 28, 2023
    Inventors: Quang LE, Brian R. YORK, Xiaoyong LIU, Son T. LE, Cherngye HWANG, Michael A. GRIBELYUK, Xiaoyu XU, Kuok San HO, Hisashi TAKANO, Julian SASAKI, Huy H. HO, Khang H. D. NGUYEN, Nam Hai PHAM
  • Publication number: 20230197132
    Abstract: The present disclosure generally relates to spin-orbit torque (SOT) magnetic tunnel junction (MTJ) devices comprising a doped bismuth antimony (BiSbE) layer having a (012) orientation. The devices may include magnetic write heads, read heads, or MRAM devices. The dopant in the BiSbE layer enhances the (012) orientation. The BiSbE layer may be formed on a texturing layer to ensure the (012) orientation, and a migration barrier may be formed over the BiSbE layer to ensure the antimony does not migrate through the structure and contaminate other layers. A buffer layer and interlayer may also be present. The buffer layer and the interlayer may each independently be a single layer of material or a multilayer of material. The buffer layer and the interlayer inhibit antimony (Sb) migration within the doped BiSbE layer and enhance uniformity of the doped BiSbE layer while further promoting the (012) orientation of the doped BiSbE layer.
    Type: Application
    Filed: June 30, 2022
    Publication date: June 22, 2023
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Cherngye HWANG, Brian R. YORK, Randy G. SIMMONS, Xiaoyong LIU, Kuok San HO, Hisashi TAKANO, Michael A. GRIBELYUK, Xiaoyu XU
  • Publication number: 20170271471
    Abstract: A method includes forming a first silicide on a substrate after patterning a gate and spacer onto the substrate. A film is deposited over the substrate. A portion of the dielectric film is removed to expose the first silicide. A portion of the first silicide is removed to form a punch through region. A liner is deposited in the punch through region. A metal layer is deposited on the liner. The substrate is annealed to form a second silicide on the substrate.
    Type: Application
    Filed: June 6, 2017
    Publication date: September 21, 2017
    Inventors: Nicolas L. Breil, Brett H. Engel, Michael A. Gribelyuk, Ahmet S. Ozcan
  • Publication number: 20170194454
    Abstract: A method includes forming a first silicide on a substrate after patterning a gate and spacer onto the substrate. A film is deposited over the substrate. A portion of the dielectric film is removed to expose the first silicide. A portion of the first silicide is removed to form a punch through region. A liner is deposited in the punch through region. A metal layer is deposited on the liner. The substrate is annealed to form a second silicide on the substrate.
    Type: Application
    Filed: January 6, 2016
    Publication date: July 6, 2017
    Inventors: Nicolas L. Breil, Brett H. Engel, Michael A. Gribelyuk, Ahmet S. Ozcan
  • Patent number: 8383483
    Abstract: The present invention relates to complementary metal-oxide-semiconductor (CMOS) circuits that each contains at least a first and a second gate stacks. The first gate stack is located over a first device region (e.g., an n-FET device region) in a semiconductor substrate and comprises at least, from bottom to top, a gate dielectric layer, a metallic gate conductor, and a silicon-containing gate conductor. The second gate stack is located over a second device region (e.g., a p-FET device region) in the semiconductor substrate and comprises at least, from bottom to top, a gate dielectric layer and a silicon-containing gate conductor. The first and second gate stacks can be formed over the semiconductor substrate in an integrated manner by various methods of the present invention.
    Type: Grant
    Filed: August 14, 2009
    Date of Patent: February 26, 2013
    Assignee: International Business Machines Corporation
    Inventors: John C. Arnold, Glenn A. Biery, Alessandro C. Callegari, Tze-Chiang Chen, Michael P. Chudzik, Bruce B. Doris, Michael A. Gribelyuk, Young-Hee Kim, Barry P. Linder, Vijay Narayanan, Joseph S. Newbury, Vamsi K. Paruchuri, Michelle L. Steen