Patents by Inventor Michael A. Jassowski

Michael A. Jassowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10324462
    Abstract: Systems and methods may use a drone swarm to increase cargo capacity. A drone swarm may include a networked drone system or two or more drones, such as a parent drone and a child drone. A method may include receiving support component balance information captured by an inertial measurement unit on the support component supported by a parent drone, adjusting movement of the parent drone according to a control system using the support component balance information, receiving an indication of a low battery in a drone in the networked drone system, the indication including an identification of a replacement drone to replace the drone with the low battery in the networked drone system, and sending a reconfiguration command to at least one child drone to incorporate the replacement drone in the networked drone system.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: June 18, 2019
    Assignee: Intel Corporation
    Inventors: Michael A Jassowski, Ashwin S Thirunahari
  • Patent number: 6784558
    Abstract: An embodiment of an integrated circuit die with staggered bond pads and optimized driver layout includes a staggered array of bond pads with an outer ring of bond pads and an inner ring of bond pads. Driver/ESD circuit cells for the outer ring of bond pads are located to the outside of the bond pads (between the outer ring of bond pads and the nearest die edge). The driver/ESD cells for the inner ring of bond pads are located to the inside of the bond pads (between the inner ring of bond pads and the die core). The integrated circuit die is coupled to a lead frame via bond wires.
    Type: Grant
    Filed: July 11, 2003
    Date of Patent: August 31, 2004
    Assignee: Intel Corporation
    Inventor: Michael A. Jassowski
  • Publication number: 20040056367
    Abstract: An embodiment of an integrated circuit die with staggered bond pads and optimized driver layout includes a staggered array of bond pads with an outer ring of bond pads and an inner ring of bond pads. Driver/ESD circuit cells for the outer ring of bond pads are located to the outside of the bond pads (between the outer ring of bond pads and the nearest die edge). The driver/ESD cells for the inner ring of bond pads are located to the inside of the bond pads (between the inner ring of bond pads and the die core). The integrated circuit die is coupled to a lead frame via bond wires.
    Type: Application
    Filed: July 11, 2003
    Publication date: March 25, 2004
    Inventor: Michael A. Jassowski
  • Patent number: 5641978
    Abstract: The I/O buffer layout of a pad-limited die comprises a pad ring having four partially-overlapping I/O-buffer arrays arranged in a pinwheel pattern at the periphery of a square die. To enable electrical interconnection of transversely-overlapping I/O buffers with the core logic of the die, overlapping I/O buffers of adjacent I/O-buffer arrays are separated by routing channels and the circuitry of longitudinally-overlapping buffers is abridged so that each of these buffers is capable of performing only a limited range of functions.
    Type: Grant
    Filed: July 7, 1995
    Date of Patent: June 24, 1997
    Assignee: Intel Corporation
    Inventor: Michael A. Jassowski