Abstract: Embodiments of the present invention disclose a method, an apparatus, and a system for establishing an FCoE communication connection and a name server. According to a WWN world wide name identifier of a target to be accessed, a destination MAC address used to access the target to be accessed is acquired. According to the destination MAC address, a login operation is performed for the target to be accessed, to establish an FCoE fiber channel over Ethernet communication connection, so that an FCoE initiator may directly establish a communication connection with an FCoE target, thereby reducing data transmission delay and lightening the processing load of an original FCoE forwarder.

Abstract: Embodiments of the invention are directed to reducing write amplification in a cache with flash memory used as a write cache. An embodiment of the invention includes partitioning at least one flash memory device in the cache into a plurality of logical partitions. Each of the plurality of logical partitions is a logical subdivision of one of the at least one flash memory device and comprises a plurality of memory pages. Data are buffered in a buffer. The data includes data to be cached, and data to be destaged from the cache to a storage subsystem. Data to be cached are written from the buffer to the at least one flash memory device. A processor coupled to the buffer is provided with access to the data written to the at least one flash memory device from the buffer, and a location of the data written to the at least one flash memory device within the plurality of logical partitions. The data written to the at least one flash memory device are destaged from the buffer to the storage subsystem.

Abstract: According to the present invention, there is provided a method of providing a WORM storage system, the method including a sector-append capability. The method includes receiving data to be written to a WORM storage system. In addition, the method includes identifying a target sector at which the data is to be written. Also, the method includes determining if the received data can be added to the target sector. Moreover, the method includes adding the received data to the target sector if it is determined that the received data can be added to the target sector.

Abstract: Embodiments of the invention are directed to reducing write amplification in a cache with flash memory used as a write cache. An embodiment of the invention includes partitioning at least one flash memory device in the cache into a plurality of logical partitions. Each of the plurality of logical partitions is a logical subdivision of one of the at least one flash memory device and comprises a plurality of memory pages. Data are buffered in a buffer. The data includes data to be cached, and data to be destaged from the cache to a storage subsystem. Data to be cached are written from the buffer to the at least one flash memory device. A processor coupled to the buffer is provided with access to the data written to the at least one flash memory device from the buffer, and a location of the data written to the at least one flash memory device within the plurality of logical partitions. The data written to the at least one flash memory device are destaged from the buffer to the storage subsystem.

Abstract: A system and method for providing a memory region/memory window (MR/MW) access notification on a system area network are provided. Whenever a previously allocated MR/MW is accessed, such as via a remote direct memory access (RDMA) read/write operation, a notification of the access is generated and written to a queue data structure associated with the MR/MW. In one illustrative embodiment, this queue data structure may be a MR/MW event queue (EQ) data structure that is created and used for all consumer processes and all MR/MWs. In other illustrative embodiments, the EQ is associated with a protection domain. In yet another illustrative embodiment, an event record may be posted to an asynchronous event handler in response to the accessing of the MR/MW. In another illustrative embodiment, a previously posted queue element may be used to generate a completion queue element in response to the accessing of the MR/MW.

Abstract: According to one embodiment, a method for using flash memory in a storage cache comprises receiving data to be cached in flash memory of a storage cache, at least some of the received data being received from at least one of a host system and a storage medium, selecting a block of the flash memory for receiving the data, buffering the received data until sufficient data has been received to fill the block, and overwriting existing data in the selected block with the buffered data. According to another embodiment, a method comprises receiving data, at least some of the data being from a host system and/or a storage medium, and sequentially overwriting sequential blocks of the flash memory with the received data. Other devices and methods for working with flash memory in a storage cache according to various embodiments are included and described herein.

Abstract: A system and method for providing a memory region/memory window (MR/MW) access notification on a system area network are provided. Whenever a previously allocated MR/MW is accessed, such as via a remote direct memory access (RDMA) read/write operation, a notification of the access is generated and written to a queue data structure associated with the MR/MW. In one illustrative embodiment, this queue data structure may be a MR/MW event queue (EQ) data stricture that is created and used for all consumer processes and all MR/MWs. In other illustrative embodiments, the EQ is associated with a protection domain. In yet another illustrative embodiment, an event record may be posted to an asynchronous event handler in response to the accessing of the MR/MW. In another illustrative embodiment, a previously posted queue element may be used to generate a completion queue element in response to the accessing of the MR/MW.

Abstract: Mechanisms for providing a memory region/memory window (MR/MW) access notification on a system area network are provided. Whenever a previously allocated MR/MW is accessed, such as via a remote direct memory access (RDMA) read/write operation, a notification of the access is generated and written to a queue data structure associated with the MR/MW. In one illustrative embodiment, this queue data structure may be a MR/MW event queue (EQ) data structure that is created and used for all consumer processes and all MR/MWs. In other illustrative embodiments, the EQ is associated with a protection domain. In yet another illustrative embodiment, an event record may be posted to an asynchronous event handler in response to the accessing of the MR/MW. In another illustrative embodiment, a previously posted queue element may be used to generate a completion queue element in response to the accessing of the MR/MW.

Abstract: Disclosed are embodiments of a storage area network (SAN), a network interface card and a method of managing data transfers. These embodiments overcome the distance limitation of the Serial Attached Small Computer System Interface (SAS) physical layer so that SAS storage protocol may be used for communication between host systems and storage controllers. Host systems and storage controls are connected via an Ethernet interface (e.g., a legacy Ethernet or enhanced Ethernet for datacenter (EED) fabric). SAS storage protocol is layered over this Ethernet interface, providing commands and transport protocol for information exchange. Since the Ethernet interface has its own physical layer, the SAS physical layer is unnecessary and, thus, so is the SAS distance limitation. If legacy Ethernet is used, over-provisioning is used to avoid packet drops, or alternatively, TCP/IP is supported in order to recover from packet drops.

Abstract: Embodiments of the invention are directed to reducing write amplification in a cache with flash memory used as a write cache. An embodiment of the invention includes partitioning at least one flash memory device in the cache into a plurality of logical partitions. Each of the plurality of logical partitions is a logical subdivision of one of the at least one flash memory device and comprises a plurality of memory pages. Data are buffered in a buffer. The data includes data to be cached, and data to be destaged from the cache to a storage subsystem. Data to be cached are written from the buffer to the at least one flash memory device. A processor coupled to the buffer is provided with access to the data written to the at least one flash memory device from the buffer, and a location of the data written to the at least one flash memory device within the plurality of logical partitions. The data written to the at least one flash memory device are destaged from the buffer to the storage subsystem.

Abstract: According to one embodiment, a method for using flash memory in a storage cache comprises receiving data to be cached in flash memory of a storage cache, at least some of the received data being received from at least one of a host system and a storage medium, selecting a block of the flash memory for receiving the data, buffering the received data until sufficient data has been received to fill the block, and overwriting existing data in the selected block with the buffered data. According to another embodiment, a method comprises receiving data, at least some of the data being from a host system and/or a storage medium, and sequentially overwriting sequential blocks of the flash memory with the received data. Other devices and methods for working with flash memory in a storage cache according to various embodiments are included and described herein.

Abstract: Mechanisms for preventing IP spoofing and facilitating parsing of private data areas in system and network connection requests are provided. With these mechanisms, an identifier, such as the high order bit of a Q_Key, is utilized to determine if a communication connection request originates with a privileged process. A second identifier is used to specify whether a private data area of a communication connection request utilizes predefined fields of a predefined structure or format. Only when the first identifier specifies that the request originates from a privileged process is the processing of the request permitted to be performed. Based on the setting of the second identifier, specific information is retrieved from the predefined fields of the private data area for use in establishing the requested communication connection.

Abstract: Mechanisms for collective send operations on a system area network are provided. The mechanisms of the illustrative embodiments provide for the creation, modification, and removal of collective send queues (CSQs) that allow the upper level protocol (ULP) used by a consumer to send the same message to a collective set of queue pairs (QPs). In order to use the transport services of a CSQ, a consumer process posts a write work request (WR) to the CSQ. The write WR causes a write work queue element (WQE) to be generated and placed in the CSQ. A channel interface (CI) is provided that effectively copies the write WQE to all of the send queues (SQs) of the QPs in the QP set associated with the CSQ. When all the QPs complete processing of their respective write WQEs, the HCA releases all data segments referenced by the write WR.

Abstract: A system and method for providing a memory region/memory window (MR/MW) access notification on a system area network are provided. Whenever a previously allocated MR/MW is accessed, such as via a remote direct memory access (RDMA) read/write operation, a notification of the access is generated and written to a queue data structure associated with the MR/MW. In one illustrative embodiment, this queue data structure may be a MR/MW event queue (EQ) data structure that is created and used for all consumer processes and all MR/MWs. In other illustrative embodiments, the EQ is associated with a protection domain. In yet another illustrative embodiment, an event record may be posted to an asynchronous event handler in response to the accessing of the MR/MW. In another illustrative embodiment, a previously posted queue element may be used to generate a completion queue element in response to the accessing of the MR/MW.

Abstract: Disclosed are embodiments of a storage area network (SAN), a network interface card and a method of managing data transfers. These embodiments overcome the distance limitation of the Serial Attached Small Computer System Interface (SAS) physical layer so that SAS storage protocol may be used for communication between host systems and storage controllers. Host systems and storage controls are connected via an Ethernet interface (e.g., a legacy Ethernet or enhanced Ethernet for datacenter (EED) fabric). SAS storage protocol is layered over this Ethernet interface, providing commands and transport protocol for information exchange. Since the Ethernet interface has its own physical layer, the SAS physical layer is unnecessary and, thus, so is the SAS distance limitation. If legacy Ethernet is used, over-provisioning is used to avoid packet drops, or alternatively, TCP/IP is supported in order to recover from packet drops.

Abstract: A system and method for preventing IP spoofing and facilitating parsing of private data areas in system and network connection requests are provided. With the system and method, an identifier, such as the high order bit of a Q_Key, is utilized to determine if a communication connection request originates with a privileged process. A second identifier is used to specify whether a private data area of a communication connection request utilizes predefined fields of a predefined structure or format. Only when the first identifier specifies that the request originates from a privileged process is the processing of the request permitted to be performed. Based on the setting of the second identifier, specific information is retrieved from the predefined fields of the private data area for use in establishing the requested communication connection.

Abstract: A system and method for collective send operations on a system area network are provided. The mechanisms of the illustrative embodiments provide for the creation, modification, and removal of collective send queues (CSQs) that allow the upper level protocol (ULP) used by a consumer to send the same message to a collective set of queue pairs (QPs). In order to use the transport services of a CSQ, a consumer process posts a write work request (WR) to the CSQ. The write WR causes a write work queue element (WQE) to be generated and placed in the CSQ. A channel interface (CI) is provided that effectively copies the write WQE to all of the send queues (SQs) of the QPs in the QP set associated with the CSQ. When all the QPs complete processing of their respective write WQEs, the HCA releases all data segments referenced by the write WR.

Abstract: A computing system includes plural nodes that are connected by a communications network. Each node comprises a communications interface that enables an exchange of messages with other nodes. A ready queue is maintained in a node and includes plural message entries, each message entry indicating an output message control data structure. The node further includes memory for storing plural output message control data structures, each including one or more chained further monrtol data structures that define data comprising a message or a portion of a message that is to be dispatched. Control data structures that are chained from an output messsage control data structure exhibit a sequence dependincy. A processor is controlled by the ready queue and enables dispatch of portions of the message designated by an output message control data structure and associated further control structures.

Abstract: A system to display an image including a first memory for storing picture data representing the image attribute data to qualify the picture data. The attribute data includes embedded synchronization data. The system further includes a circuit that produces the image by scanning the picture data qualified by the attribute data onto to a display in accordance with the synchronization data. This invention further provides for storing the synchronization data within the attribute data enabling the synchronization data to be programmable but only requiring update of the synchronization data when the synchronization data is to be changed. The memory includes two buffers wherein one buffer is loaded with attribute and synchronization data while the other buffer is being read. After the other buffer is read, the buffers are toggled such so that the loaded buffer is read to provide the attribute and synchronization data while the previously read buffer is loaded with new attribute and synchronization data.

Abstract: A coding system applicable to communication is provided so that variable length code representations of a set of characters may be transmitted. The system transmits a data stream made up of a series of variable length code representations of the characters in the set. A fixed code representation follows the end of each character representation. This data stream is received by apparatus which includes coding apparatus which reads the fixed code representations in order to determine the ends of each variable length character representation. The coding is set up so that the code is a binary code in which the most commonly used characters in the set are represented by code having the minimum number of digits, and the progressively less commonly used characters are respectively represented by code having progressively increasing numbers of digits. Preferably the fixed code representing the end of each character is 01.