Abstract: A number of blocks are reciprocably supported in a polishing apparatus in accordance with this invention, entirely independent of each other so that lifting motion of one block is not transferred to an adjacent block, thus providing flexibility to follow the global curvature of the wafer. The polishing apparatus uses a block of a very hard design to ensure minimal deflection of the block into the microstructure of the wafer. Each block removes a portion of the wafer using relative motion between the block and the wafer. Each block is supported by at least three regions of the wafer during the relative motion, wherein each of the regions has the slowest rate of material removal in a die enclosing that region. In one embodiment, the smallest dimension of a block is approximately three times the size of the side of a die.

Abstract: A polishing machine for polishing a single side (e.g. a circuit side) of a workpiece (e.g. a semiconductor wafer) includes two platens. A first platen can be a workpiece-holding platen having slots or other structure for holding wafers or other workpieces. The second platen is a polishing platen and is covered with a polishing pad or other material used for polishing, e.g. glass or metal polishing. The two platens have laterally spaced axes of rotation such that, from a top view, the right side of one platen overlaps the left side of the other platen or vice versa. The two platens are both rotated at the same angular velocity i.e. at the same revolutions per minute (RPM) and both clockwise or both counterclockwise, and the two platens overlap such that the differences in velocity (i.e., relative velocity) between overlapping points on the two platens across a workpiece held on the first platen is constant.

Abstract: A number of blocks are reciprocably supported in a polishing apparatus in accordance with this invention, entirely independent of each other so that lifting motion of one block is not transferred to an adjacent block, thus providing flexibility to follow the global curvature of the wafer. The polishing apparatus uses a block of a very hard design to ensure minimal deflection of the block into the microstructure of the wafer. Each block removes a portion of the wafer using relative motion between the block and the wafer. Each block is supported by at least three regions of the wafer during the relative motion, wherein each of the regions has the slowest rate of material removal in a die enclosing that region. In one embodiment, the smallest dimension of a block is approximately three times the size of the side of a die.

Abstract: A number of blocks are reciprocably supported in a polishing apparatus in accordance with this invention, entirely independent of each other so that lifting motion of one block is not transferred to an adjacent block, thus providing flexibility to follow the global curvature of the wafer. The polishing apparatus uses a block of a very hard design to ensure minimal deflection of the block into the microstructure of the wafer. Each block removes a portion of the wafer using relative motion between the block and the wafer. Each block is supported by at least three regions of the wafer during the relative motion, wherein each of the regions has the slowest rate of material removal in a die enclosing that region. In one embodiment, the smallest dimension of a block is approximately three times the size of the side of a die.

Abstract: The invention provides a method for producing a substantially planar surface overlying features of a semiconductor structure. The method comprises forming alternating layers of a hard polishing material and a soft polishing material over the features of the semiconductor structure, and then polishing the alternating layers to form a substantially planar surface over the features. The method takes advantage of the polish rates of the various materials used as alternating layers to enhance the planarization process.

Abstract: The invention provides a method for producing a substantially planar surface overlying features of a semiconductor structure. The method comprises forming alternating layers of a hard polishing material and a soft polishing material over the features of the semiconductor structure, and then polishing the alternating layers to form a substantially planar surface over the features. The method takes advantage of the polish rates of the various materials used as alternating layers to enhance the planarization process.

Abstract: The present invention relates to an apparatus for remotely detecting impedance adapted for use on a polishing machine wherein the end point of polishing for removing a surface layer during the processing of semiconductor substrates is detected. A first stationary coil having a high permeability core is wound having an air gap and an AC voltage is applied to the stationary coil to provide a magnetic flux in the air gap. A second coil is mounted for rotation on the polishing table, in a position to periodically pass through the air gap of the stationary coil as the table rotates. The second coil is connected at its opposite ends to contacts which are embedded in the surface of the polishing wheel.

Abstract: The present invention relates to a method and apparatus for remotely detecting impedance. It is specifically adapted for use on a polishing machine wherein the end point of polishing for removing a surface layer during the processing of semiconductor substrates is detected. A first, or stationary coil having a high permeability core is wound having an air gap and an AC voltage is applied to the stationary coil to provide a magnetic flux in the air gap. A second coil is mounted for rotation on the polishing table, in a position to periodically pass through the air gap of the stationary coil as the table rotates. The second coil is connected at its opposite ends to contacts which are embedded in the surface of the polishing wheel. The contacts are positioned to engage the surface of the substrate which is being polished and provide a load on the second or rotating coil.

Abstract: A method for forming an electrically conductive line between two layers of insulating material and method for connecting the line through both layers of the insulating material to the opposite surfaces is provided. In the method, first, second and third layers of insulating material are provided wherein the first and third layers are separated by the second layer of insulating material which is different in etch rate from the first and third layers. The edge portion of all three layers is exposed and the insulating layer of the second material is selectively etched to remove the revealed edge portion and provide a slot between the first and third layers of insulating material. Also openings are provided in both the first and third layers of insulating material which communicate with the slot and extend respectively through the layers of the first and third insulating material.

Abstract: The present invention relates to a method and apparatus for remotely detecting impedance. It is specifically adapted for use on a polishing machine wherein the end point of polishing for removing a surface layer during the processing of semiconductor substrates is detected. A first, or stationary coil having a high permeability core is wound having an air gap and an AC voltage is applied to the stationary coil to provide a magnetic flux in the air gap. A second coil is mounted for rotation on the polishing table, in a position to periodically pass through the air gap of the stationary coil as the table rotates. The second coil is connected at its opposite ends to contacts which are embedded in the surface of the polishing wheel. The contacts are positioned to engage the surface of the substrate which is being polished and provide a load on the second or rotating coil.

Abstract: A method for forming an electrically conductive line between two layers of insulating material and method for connecting the line through both layers of the insulating material to the opposite surfaces is provided. In the method, first, second and third layers of insulating material are provided wherein said first and third layers are separated by said second layer of insulating material which is different in etch rate from the first and third layers. The edge portion of all three layers is exposed and the insulating layer of the second material is selectively etched to remove the revealed edge portion and provide a slot between the first and third layers of insulating material. Also openings are provided in both the first and third layers of insulating material which communicate with the slot and extend respectively through the layers of the first and third insulating material.

Abstract: A method of forming a plurality of conductive studs within a non-planar insulator layer (e.g., PSG or BPSG) disposed between a first series of conductive structures arranged on a substrate and metal lines formed on the upper surface of the insulator layer. Vertical vias are defined through the insulator layer to expose at least one of the first conductive structures on the substrate. A conformal metal layer (e.g., CVD W) is deposited on the insulator layer to fill the vias. Then, the metal layer and the insulator layer subjected to a polish etch in the presence of an abrasive slurry, to remove portions of the metal layer outside of the vias while simultaneously planarizing the insulator layer.

Abstract: A polishing tool for abrasively polishing a semiconductor wafer that edge clamps the wafer between two rollers. The wafer is spun-up in one plane and the rollers spin in a second plane which is orthogonal to the wafer spin plane. One of the rollers is split with each section rotating in opposite directions. Each of the rollers is mounted by a spring-gimballed assembly to follow the wafer contour.

Abstract: In a chem-mech polishing process for planarizing insulators such as silicon oxide and silicon nitride, a pool of slurry is utilized at a temperature between 85.degree. F.-95.degree. F. The slurry particulates (e.g. silica) have a hardness commensurate to the hardness of the insulator to be polished. Under these conditions, wafers can be polished at a high degree of uniformity more economically (by increasing pad lifetime), without introducing areas of locally incomplete polishing.

Abstract: A conformal organic layer is used to define spacers on the sidewalls of an organic mandrel. The organic layer (e.g., parylene) can be deposited at low temperatures, and as such is compatible with temperature-sensitive mandrel materials that reflow at high deposition temperatures. The conformal organic material can be dry etched as the same rate as the organic mandrels, while being resistant to wet strip solvents that remove the organic mandrels. This series of etch characteristics make the organic mandrel-organic spacer combination compatible with a host of masking applications.

Abstract: An apparatus and method for monitoring the conductivity of a semiconductor wafer during the course of a polishing process. A polishing pad that contacts the wafer has an active electrode and at least one passive electrode, both of which are embedded in the polishing pad. A detecting device is connected to the active and passive electrodes for monitoring the current between the electrodes as the wafer is lapped by the polishing pad. The etch endpoint of the wafer is determined as a function of the magnitude of the current flow.

Abstract: A coaxial wiring structure that is constructed by depositing and etching a series of conductor layers and insulator layers.

Abstract: In a chem-mech polishing process for planarizing insulators such as silicon oxide and silicon nitride, a pool of slurry is utilized at a temperature between 85° F.-95° F. The slurry particulates (e.g. silica) have a hardness commensurate to the hardness of the insulator to be polished. Under these conditions, wafers can be polished at a high degree of uniformity more economically (by increasing pad lifetime), without introducing areas of locally incomplete polishing.