Abstract: A two-gate field-effect transistor (FET) is designed to operate at cryogenic temperatures (circa 1.degree.-20.degree. K.). For an N channel FET, the low-concentration weak-P type material used for the channel region is built into an intrinsic (or near-intrinsic) layer which in turn is built on a P type substrate. The first gate corresponds to a conventional FET control gate. The second gate may be designated a weak-source gate and is directly above a corresponding weak-source region which is itself adjacent to the conventional (strong) source region. The weak-source gate is placed at a fixed positive potential with respect to the source region so that the electrons will collect in the conduction band within the weak-source region. Once the required fixed weak-source gate potential has been established, the control gate functions in a conventional manner even when the device is at a cryogenic temperature.

Abstract: A preferred embodiment of the invention is a three-gate charge-coupled device (CCD) which is designed to operate at cryogenic temperatures (circa 1-20.degree. K). For an N channel device, a low-concentration N type material is separated from a P type substrate by a thin layer of intrinsic material. The active detection area is underneath a transparent detector gate which functions as the device's input gate. Electrons excited into the conduction band under the detector gate flow into the conduction band under the adjoining second gate which functions as an integrating gate by collecting the electrons that flow from under the input gate. The third gate also adjoins the second gate and is called the readout gate. When the readout gate is at a low potential, it dams up the electrons in the conduction band under the integrate gate.

Abstract: A relatively thin layer of extrinsic material formed on the top surface of a nearly intrinsic semiconductor substrate forms the detector area of an infrared detector device. A source region is provided along a portion of the perimeter of the detector area and is electrically coupled to the extrinsic detector area by means of an external connection. A drain channel is provided which is separated from the detector area by a gate region. The concentration of the extrinsic material in the detector area is sufficient for it to be at least a poor conductor. Thus, replacement electrons can flow from the source region into the extrinsic detector area via the external connection and electrical charge-neutrality can thereby be maintained at the extrinsic sites. The gate electrode forms a fringing field extending into the detector area which facilitates conduction from the detector area to the drain channel during the read-out process.