Patents by Inventor Michael A. O'Connor
Michael A. O'Connor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250123881Abstract: Embodiments of systems, methods, and apparatuses for heterogeneous computing are described. In some embodiments, a hardware heterogeneous scheduler dispatches instructions for execution on one or more plurality of heterogeneous processing elements, the instructions corresponding to a code fragment to be processed by the one or more of the plurality of heterogeneous processing elements, wherein the instructions are native instructions to at least one of the one or more of the plurality of heterogeneous processing elements.Type: ApplicationFiled: October 25, 2024Publication date: April 17, 2025Inventors: Rajesh M. SANKARAN, Gilbert NEIGER, Narayan RANGANATHAN, Stephen R. VAN DOREN, Joseph NUZMAN, Niall D. MCDONNELL, Michael A. O'HANLON, Lokpraveen B. MOSUR, Tracy Garrett DRYSDALE, Eriko NURVITADHI, Asit K. MISHRA, Ganesh VENKATESH, Deborah T. MARR, Nicholas P. CARTER, Jonathan D. PEARCE, Edward T. GROCHOWSKI, Richard J. GRECO, Robert VALENTINE, Jesus CORBAL, Thomas D. FLETCHER, Dennis R. BRADFORD, Dwight P. MANLEY, Mark J. CHARNEY, Jeffry J. COOK, Paul CAPRIOLI, Koichi YAMADA, Kent D. GLOSSOP, David B. SHEFFIELD
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Patent number: 12135981Abstract: Embodiments of systems, methods, and apparatuses for heterogeneous computing are described. In some embodiments, a hardware heterogeneous scheduler dispatches instructions for execution on one or more plurality of heterogeneous processing elements, the instructions corresponding to a code fragment to be processed by the one or more of the plurality of heterogeneous processing elements, wherein the instructions are native instructions to at least one of the one or more of the plurality of heterogeneous processing elements.Type: GrantFiled: June 9, 2023Date of Patent: November 5, 2024Assignee: Intel CorporationInventors: Rajesh M. Sankaran, Gilbert Neiger, Narayan Ranganathan, Stephen R. Van Doren, Joseph Nuzman, Niall D. McDonnell, Michael A. O'Hanlon, Lokpraveen B. Mosur, Tracy Garrett Drysdale, Eriko Nurvitadhi, Asit K. Mishra, Ganesh Venkatesh, Deborah T. Marr, Nicholas P. Carter, Jonathan D. Pearce, Edward T. Grochowski, Richard J. Greco, Robert Valentine, Jesus Corbal, Thomas D. Fletcher, Dennis R. Bradford, Dwight P. Manley, Mark J. Charney, Jeffrey J. Cook, Paul Caprioli, Koichi Yamada, Kent D. Glossop, David B. Sheffield
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Publication number: 20230418655Abstract: Embodiments of systems, methods, and apparatuses for heterogeneous computing are described. In some embodiments, a hardware heterogeneous scheduler dispatches instructions for execution on one or more plurality of heterogeneous processing elements, the instructions corresponding to a code fragment to be processed by the one or more of the plurality of heterogeneous processing elements, wherein the instructions are native instructions to at least one of the one or more of the plurality of heterogeneous processing elements.Type: ApplicationFiled: June 9, 2023Publication date: December 28, 2023Inventors: Rajesh M. SANKARAN, Gilbert NEIGER, Narayan RANGANATHAN, Stephen R. VAN DOREN, Joseph NUZMAN, Niall D. MCDONNELL, Michael A. O'HANLON, Lokpraveen B. MOSUR, Tracy Garrett DRYSDALE, Eriko NURVITADHI, Asit K. MISHRA, Ganesh VENKATESH, Deborah T. MARR, Nicholas P. CARTER, Jonathan D. PEARCE, Edward T. GROCHOWSKI, Richard J. GRECO, Robert VALENTINE, Jesus CORBAL, Thomas D. FLETCHER, Dennis R. BRADFORD, Dwight P. MANLEY, Mark J. CHARNEY, Jeffrey J. COOK, Paul CAPRIOLI, Koichi YAMADA, Kent D. GLOSSOP, David B. SHEFFIELD
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Publication number: 20230400665Abstract: A laser ablation tool including, a pulsed laser source, a prism that rotates in a plane perpendicular to light from the laser source, and a mirror that is moveable in at least one direction and which is set at an angle relative to the light from the laser source.Type: ApplicationFiled: May 15, 2023Publication date: December 14, 2023Applicant: ROLLS-ROYCE plcInventors: Andrew D. NORTON, Michael A. O'KEY
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Publication number: 20230398634Abstract: A laser ablation tool comprising a laser source which produces a beam heaving a beam path and an ablation head, the ablation head comprising a housing which on each side of the beam path is separated into a first and second portion, and at least a first Risley prism and a second Risley prism connected to the first and second portions of the housing the first and second Risley prisms being connected to a rotation mechanism, so that the two Risley prisms can be moved relative to each other and the housing so as to deflect the beam.Type: ApplicationFiled: May 15, 2023Publication date: December 14, 2023Applicant: ROLLS-ROYCE plcInventors: Andrew D. NORTON, James KELL, Michael A. O'KEY
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Patent number: 11693691Abstract: Embodiments of systems, methods, and apparatuses for heterogeneous computing are described. In some embodiments, a hardware heterogeneous scheduler dispatches instructions for execution on one or more plurality of heterogeneous processing elements, the instructions corresponding to a code fragment to be processed by the one or more of the plurality of heterogeneous processing elements, wherein the instructions are native instructions to at least one of the one or more of the plurality of heterogeneous processing elements.Type: GrantFiled: July 21, 2021Date of Patent: July 4, 2023Assignee: Intel CorporationInventors: Rajesh M. Sankaran, Gilbert Neiger, Narayan Ranganathan, Stephen R. Van Doren, Joseph Nuzman, Niall D. McDonnell, Michael A. O'Hanlon, Lokpraveen B. Mosur, Tracy Garrett Drysdale, Eriko Nurvitadhi, Asit K. Mishra, Ganesh Venkatesh, Deborah T. Marr, Nicholas P. Carter, Jonathan D. Pearce, Edward T. Grochowski, Richard J. Greco, Robert Valentine, Jesus Corbal, Thomas D. Fletcher, Dennis R. Bradford, Dwight P. Manley, Mark J. Charney, Jeffrey J. Cook, Paul Caprioli, Koichi Yamada, Kent D. Glossop, David B. Sheffield
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Patent number: 11416281Abstract: Embodiments of systems, methods, and apparatuses for heterogeneous computing are described. In some embodiments, a hardware heterogeneous scheduler dispatches instructions for execution on one or more plurality of heterogeneous processing elements, the instructions corresponding to a code fragment to be processed by the one or more of the plurality of heterogeneous processing elements, wherein the instructions are native instructions to at least one of the one or more of the plurality of heterogeneous processing elements.Type: GrantFiled: December 31, 2016Date of Patent: August 16, 2022Assignee: Intel CorporationInventors: Rajesh M. Sankaran, Gilbert Neiger, Narayan Ranganathan, Stephen R. Van Doren, Joseph Nuzman, Niall D. McDonnell, Michael A. O'Hanlon, Lokpraveen B. Mosur, Tracy Garrett Drysdale, Eriko Nurvitadhi, Asit K. Mishra, Ganesh Venkatesh, Deborah T. Marr, Nicholas P. Carter, Jonathan D. Pearce, Edward T. Grochowski, Richard J. Greco, Robert Valentine, Jesus Corbal, Thomas D. Fletcher, Dennis R. Bradford, Dwight P. Manley, Mark J. Charney, Jeffrey J. Cook, Paul Caprioli, Koichi Yamada, Kent D. Glossop, David B. Sheffield
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Publication number: 20220164218Abstract: Embodiments of systems, methods, and apparatuses for heterogeneous computing are described. In some embodiments, a hardware heterogeneous scheduler dispatches instructions for execution on one or more plurality of heterogeneous processing elements, the instructions corresponding to a code fragment to be processed by the one or more of the plurality of heterogeneous processing elements, wherein the instructions are native instructions to at least one of the one or more of the plurality of heterogeneous processing elements.Type: ApplicationFiled: July 21, 2021Publication date: May 26, 2022Inventors: Rajesh M. SANKARAN, Gilbert NEIGER, Narayan RANGANATHAN, Stephen R. VAN DOREN, Joseph NUZMAN, Niall D. MCDONNELL, Michael A. O'HANLON, Lokpraveen B. MOSUR, Tracy Garrett DRYSDALE, Eriko NURVITADHI, Asit K. MISHRA, Ganesh VENKATESH, Deborah T. MARR, Nicholas P. CARTER, Jonathan D. PEARCE, Edward T. GROCHOWSKI, Richard J. GRECO, Robert VALENTINE, Jesus CORBAL, Thomas D. FLETCHER, Dennis R. BRADFORD, Dwight P. MANLEY, Mark J. CHARNEY, Jeffrey J. COOK, Paul CAPRIOLI, Koichi YAMADA, Kent D. GLOSSOP, David B. SHEFFIELD
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Patent number: 11093277Abstract: Embodiments of systems, methods, and apparatuses for heterogeneous computing are described. In some embodiments, a hardware heterogeneous scheduler dispatches instructions for execution on one or more plurality of heterogeneous processing elements, the instructions corresponding to a code fragment to be processed by the one or more of the plurality of heterogeneous processing elements, wherein the instructions are native instructions to at least one of the one or more of the plurality of heterogeneous processing elements.Type: GrantFiled: June 26, 2020Date of Patent: August 17, 2021Assignee: Intel CorporationInventors: Rajesh M. Sankaran, Gilbert Neiger, Narayan Ranganathan, Stephen R. Van Doren, Joseph Nuzman, Niall D. McDonnell, Michael A. O'Hanlon, Lokpraveen B. Mosur, Tracy Garrett Drysdale, Eriko Nurvitadhi, Asit K. Mishra, Ganesh Venkatesh, Deborah T. Marr, Nicholas P. Carter, Jonathan D. Pearce, Edward T. Grochowski, Richard J. Greco, Robert Valentine, Jesus Corbal, Thomas D. Fletcher, Dennis R. Bradford, Dwight P. Manley, Mark J. Charney, Jeffrey J. Cook, Paul Caprioli, Koichi Yamada, Kent D. Glossop, David B. Sheffield
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Publication number: 20200401440Abstract: Embodiments of systems, methods, and apparatuses for heterogeneous computing are described. In some embodiments, a hardware heterogeneous scheduler dispatches instructions for execution on one or more plurality of heterogeneous processing elements, the instructions corresponding to a code fragment to be processed by the one or more of the plurality of heterogeneous processing elements, wherein the instructions are native instructions to at least one of the one or more of the plurality of heterogeneous processing elements.Type: ApplicationFiled: June 26, 2020Publication date: December 24, 2020Inventors: Rajesh M. SANKARAN, Gilbert NEIGER, Narayan RANGANATHAN, Stephen R. VAN DOREN, Joseph NUZMAN, Niall D. MCDONNELL, Michael A. O'HANLON, Lokpraveen B. MOSUR, Tracy Garrett DRYSDALE, Eriko NURVITADHI, Asit K. MISHRA, Ganesh VENKATESH, Deborah T. MARR, Nicholas P. CARTER, Jonathan D. PEARCE, Edward T. GROCHOWSKI, Richard J. GRECO, Robert VALENTINE, Jesus CORBAL, Thomas D. FLETCHER, Dennis R. BRADFORD, Dwight P. MANLEY, Mark J. CHARNEY, Jeffrey J. COOK, Paul CAPRIOLI, Koichi YAMADA, Kent D. GLOSSOP, David B. SHEFFIELD
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Patent number: 10521527Abstract: An apparatus is provided for analysis of a leading edge rib of a fixed leading edge section of an aircraft wing. The apparatus may identify geometric or inertial properties of a plurality of stiffeners of the rib, and based thereon perform an analysis to predict a failure rate of the leading edge rib under an external load. From the failure rate, the apparatus may determine a structural integrity of the leading edge rib under the external load. Performing the analysis may include importing a plurality of section cuts into a finite element model of the rib and thereby identifying nodes proximate the section cuts. Under an external load, internal load distributions may be extracted from elements proximate the nodes and elements, and the failure rate of the leading edge rib under the external load may be predicted based on the internal load distributions of the elements.Type: GrantFiled: June 24, 2016Date of Patent: December 31, 2019Assignee: The Boeing CompanyInventors: Eric S. Lester, Michael A. O'Grady, Alan N. Baumgarten, Navin Kumar, Venkata Narasimha Ravi Udali, Sachin Kulshrestha, Tejoram Bhagavathula
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Publication number: 20190347125Abstract: Embodiments of systems, methods, and apparatuses for heterogeneous computing are described. In some embodiments, a hardware heterogeneous scheduler dispatches instructions for execution on one or more plurality of heterogeneous processing elements, the instructions corresponding to a code fragment to be processed by the one or more of the plurality of heterogeneous processing elements, wherein the instructions are native instructions to at least one of the one or more of the plurality of heterogeneous processing elements.Type: ApplicationFiled: December 31, 2016Publication date: November 14, 2019Inventors: Rajesh M. SANKARAN, Gilbert NEIGER, Narayan RANGANATHAN, Stephen R. VAN DOREN, Joseph NUZMAN, Niall D. MCDONNELL, Michael A. O'HANLON, Lokpraveen B. MOSUR, Tracy Garrett DRYSDALE, Eriko NURVITADHI, Asit K. MISHRA, Ganesh VENKATESH, Deborah T. MARR, Nicholas P. CARTER, Jonathan D. PEARCE, Edward T. GROCHOWSKI, Richard J. GRECO, Robert VALENTINE, Jesus CORBAL, Thomas D. FLETCHER, Dennis R. BRADFORD, Dwight P. MANLEY, Mark J. CHARNEY, Jeffrey J. COOK, Paul CAPRIOLI, Koichi YAMADA, Kent D. GLOSSOP, David B. SHEFFIELD
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Publication number: 20190199602Abstract: Virtual Network Functions (VNF) key performance indicator values can be predicted based on data analytics with an integration of data processing techniques and machine learning algorithms to allow proactive actions to provide Network Functions Virtualization service assurance.Type: ApplicationFiled: March 1, 2019Publication date: June 27, 2019Inventors: Tong ZHANG, Zhu ZHOU, Michael A. O'HANLON, Atul KWATRA, Brendan RYAN
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Patent number: 10295438Abstract: An apparatus is provided for analysis of a leading edge rib of a fixed leading edge section of an aircraft wing. The apparatus may identify geometric or inertial properties of a plurality of stiffeners of the rib in which respective stiffeners are represented by a collection of geometry within a solid model of the rib, and perform an analysis to predict a failure rate of the leading edge rib under an external load. From the failure rate, the apparatus may determine a structural integrity of the leading edge rib under the external load. Identifying the properties may include, extracting a section cut of the geometry that corresponds to and has one or more properties of the respective stiffener, and identifying the properties of the cross-section and thereby the respective stiffener based on a correlation of the cross-section to a generic profile of a plurality of different cross-sections.Type: GrantFiled: June 24, 2016Date of Patent: May 21, 2019Assignee: The Boeing CompanyInventors: Eric S. Lester, Michael A. O'Grady, Alan N. Baumgarten, Navin Kumar, Venkata Narasimha Ravi Udali, Sachin Kulshrestha, Tejoram Bhagavathula
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Patent number: 10289092Abstract: A computer-implemented method for performing stability analysis for a digital motor controller includes receiving a reference signal to be injected into a digital speed control loop and controlling, by a hardware description language (VHDL) component, the injection of the reference signal into the digital control loop through a field programmable gate array (FPGA) hardware interface. The method also includes providing the reference signal to the digital speed control loop to determine a performance of the digital motor controller and receiving a feedback signal, at the FPGA hardware interface, from the digital speed control loop based on the reference signal. The method includes comparing the reference signal to the feedback signal to evaluate the performance of the digital motor controller and exporting a result of the comparing by the FPGA hardware interface to indicate the performance of the digital motor controller.Type: GrantFiled: January 14, 2016Date of Patent: May 14, 2019Assignee: HAMILTON SUNDSTRAND SPACE SYSTEMS INTERNATIONAL INC.Inventors: Robert P. Wichowski, Kevin G. Hawes, Michael A. O'Toole
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Publication number: 20190097948Abstract: An apparatus, including: a hardware platform; logic to execute on the hardware platform, the logic configured to: receive a batch including first plurality of packets; identify a common attribute of the batch; perform batch processing on the batch according to the common attribute; generate a hint for the batch, the hint comprising information about the batch to facilitate processing of the batch; and forward the batch to a host platform network interface with the hint.Type: ApplicationFiled: September 28, 2017Publication date: March 28, 2019Applicant: Intel CorporationInventors: John J. Browne, Christopher MacNamara, Tomasz Kantecki, Barak Hermesh, Sean Harte, Andrey Chilikin, Brendan Ryan, Bruce Richardson, Michael A. O'Hanlon, Andrew Cunningham
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Publication number: 20180298293Abstract: Multifunctional catalysts are used to prepare modified bio-oils with improved characteristics. Bio-oil vapor phase, e.g., produced by pyrolysis of biomass, is contacted with a multifunctional catalyst. The multifunctional catalyst catalyzes a plurality of distinct reactions of the bio-oil vapor phase to produce a modified bio-oil.Type: ApplicationFiled: October 20, 2015Publication date: October 18, 2018Inventors: Zia Abdullah, Rachid Taha, Stephanie Flamberg, Michael A. O'Brian
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Patent number: 9992299Abstract: Technologies for identifying a cache line of a network packet for eviction from an on-processor cache of a network device communicatively coupled to a network controller. The network device is configured to determine whether a cache line of the cache corresponding to the network packet is to be evicted from the cache based on a determination that the network packet is not needed subsequent to processing the network packet, and provide an indication that the cache line is to be evicted from the cache based on an eviction policy received from the network controller.Type: GrantFiled: February 7, 2017Date of Patent: June 5, 2018Assignee: Intel CorporationInventors: Ren Wang, Sameh Gobriel, Christian Maciocco, Tsung-Yuan C. Tai, Ben-Zion Friedman, Hang T. Nguyen, Namakkal N. Venkatesan, Michael A. O'Hanlon, Shrikant M. Shah, Sanjeev Jain
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Patent number: 9866498Abstract: Technologies for identifying a cache line of a network packet for eviction from an on-processor cache of a network device communicatively coupled to a network controller. The network device is configured to determine whether a cache line of the cache corresponding to the network packet is to be evicted from the cache based on a determination that the network packet is not needed subsequent to processing the network packet, and provide an indication that the cache line is to be evicted from the cache based on an eviction policy received from the network controller.Type: GrantFiled: December 23, 2014Date of Patent: January 9, 2018Assignee: Intel CorporationInventors: Ren Wang, Sameh Gobriel, Christian Maciocco, Tsung-Yuan C. Tai, Ben-Zion Friedman, Hang T. Nguyen, Namakkal N. Venkatesan, Michael A. O'Hanlon, Shrikant M. Shah, Sanjeev Jain
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Publication number: 20170371989Abstract: An apparatus is provided for analysis of a leading edge rib of a fixed leading edge section of an aircraft wing. The apparatus may identify geometric or inertial properties of a plurality of stiffeners of the rib, and based thereon perform an analysis to predict a failure rate of the leading edge rib under an external load. From the failure rate, the apparatus may determine a structural integrity of the leading edge rib under the external load. Performing the analysis may include importing a plurality of section cuts into a finite element model of the rib and thereby identifying nodes proximate the section cuts. Under an external load, internal load distributions may be extracted from elements proximate the nodes and elements, and the failure rate of the leading edge rib under the external load may be predicted based on the internal load distributions of the elements.Type: ApplicationFiled: June 24, 2016Publication date: December 28, 2017Inventors: Eric S. Lester, Michael A. O'Grady, Alan N. Baumgarten, Navin Kumar, Venkata Narasimha Ravi Udali, Sachin Kulshrestha, Tejoram Bhagavathula