Abstract: Embodiments described herein relate to an analyte monitoring device having a user interface with a display and a plurality of actuators. The display is configured to render a plurality of display screens, including a home screen and an alert screen. The home screen is divided into a plurality of simultaneously displayed panels, with a first panel displays a rate of change of continuously monitored analyte levels in interstitial fluid, a second panel simultaneously displays a current analyte level and an analyte trend indicator, and a third panel displays status information of a plurality of components of the device. When an alarm condition is detected, the display renders the alert screen in place of the home screen, the alert screen displaying information corresponding to the detected alarm condition. Furthermore, the actuators are configured to affect further output of the analyte monitoring device corresponding to the detected condition.

Abstract: Embodiments described herein relate to an analyte monitoring device having a user interface with a display and a plurality of actuators. The display is configured to render a plurality of display screens, including a home screen and an alert screen. The home screen is divided into a plurality of simultaneously displayed panels, with a first panel displays a rate of change of continuously monitored analyte levels in interstitial fluid, a second panel simultaneously displays a current analyte level and an analyte trend indicator, and a third panel displays status information of a plurality of components of the device. When an alarm condition is detected, the display renders the alert screen in place of the home screen, the alert screen displaying information corresponding to the detected alarm condition. Furthermore, the actuators are configured to affect further output of the analyte monitoring device corresponding to the detected condition.

Abstract: A method of jitter measurement is provided and includes sampling a device-under-test (DUT) output signal, having a repeating pattern, using an asynchronous clock over a desired period of time and mapping the samples onto a single period of the repeating pattern. Each period of the repeating pattern is sampled at least twice. A sampling frequency of the asynchronous clock is based on user inputs. Sampling the DUT signal comprises capturing logical state information representing each edge of a single period of the DUT signal at least once. The method further includes, separating the samples into subsets and mapping the sample subsets onto a single period of the repeating pattern wherein the samples within a particular subset are mapped to a set of times which are in the same order as in which the samples were obtained, processing the samples within each subset independently of samples in other subsets, and combining results of the processed subsets and processing the combined results of the subsets.

Abstract: A jitter frequency determining system is provided that includes a comparator, a clock source, a latching circuit, a memory device and a processor. The comparator is adapted to receive at least one output signal from a device under test and compare the output signal to an expected signal. The output signal has a repeating pattern. The clock source is adapted to produce a sampling clock based on user inputs. The clock source is further adapted to change the time between locally-in-order strobes to adjust the measurement bandwidth. The latching circuit is adapted to obtain samples of the output signal according to the sampling clock. The memory device is adapted to store the sampled data. The processor is adapted to analyze the stored data to determine jitter and to express jitter as a function of frequency.

Abstract: A method of determining frequency components of jitter in a waveform is provided. The method includes strobing a waveform having a repetitive pattern. Forming a locally-in-order strobing scheme of a representative one of the repetitive pattern including subsets of locally-in-order strobes. Locating transition regions in the subsets of locally-in-order strobes. Determining random jitter associated for each transition region and determining jitter as a function of frequency.

Abstract: A jitter frequency determining system is provided that includes a comparator, a clock source, a latching circuit, a memory device and a processor. The comparator is adapted to receive at least one output signal from a device under test and compare the output signal to an expected signal. The output signal has a repeating pattern. The clock source is adapted to produce a sampling clock based on user inputs, wherein the user inputs comprise a number of bits per one period of the repeating pattern, a length of a single bit period, a target effective sampling resolution and a number of times to sweep the repeating pattern. The clock source is further adapted to change the time between locally-in-order strobes to adjust the measurement bandwidth. The latching circuit is adapted to obtain samples of the output signal according to the sampling clock. The memory device is adapted to store the sampled data.

Abstract: A method of determining frequency components of jitter in a waveform is provided. The method comprises strobing a waveform having a repetitive pattern. Forming a locally-in-order strobing scheme of a representative one of the repetitive pattern including subsets of locally-in-order strobes. Locating transition regions in the subsets of locally-in-order strobes. Determining random jitter associated for each transition region and determining jitter as a function of frequency.

Abstract: A method of determining frequency components of jitter in a waveform is provided. The method includes conducting a plurality of locally-in-order strobings of the waveform. Changing the acquisition time associated with each locally-in-order strobing. Measuring jitter associated with each locally-in-order strobing and determining jitter as a function of frequency based on the measured jitter associated with each change of acquisition time.

Abstract: A method of jitter measurement is provided and includes sampling a device-under-test (DUT) output signal, having a repeating pattern, using an asynchronous clock over a desired period of time and mapping the samples onto a single period of the repeating pattern. Each period of the repeating pattern is sampled at least twice. A sampling frequency of the asynchronous clock is based on user inputs. Sampling the DUT signal comprises capturing logical state information representing each edge of a single period of the DUT signal at least once. The method further includes, separating the samples into subsets and mapping the sample subsets onto a single period of the repeating pattern wherein the samples within a particular subset are mapped to a set of times which are in the same order as in which the samples were obtained, processing the samples within each subset independently of samples in other subsets, and combining results of the processed subsets and processing the combined results of the subsets.

Abstract: A method of determining frequency components of jitter in a waveform is provided. The method includes conducting a plurality of locally-in-order strobings of the waveform. Changing the acquisition time associated with each locally-in-order strobing. Measuring jitter associated with each locally-in-order strobing and determining jitter as a function of frequency based on the measured jitter associated with each change of acquisition time.

Abstract: A system and method for economically yet thoroughly testing serial ports of electronic devices includes a receiver and a transmitter. The receiver is coupled to a TX line of a device under test for receiving an input serial bit stream from the device under test. The transmitter is coupled to a RX line of the device under test for providing an Output serial bit stream to the device under test. The receiver is coupled to the transmitter for establishing a loopback connection. A time distortion circuit is interposed between the receiver and the transmitter, for adding predetermined amounts of timing distortion to the output serial bit stream. In addition, a selector is interposed between the receiver and the transmitter, for selecting between the receiver and a direct input. The direct input provides an algorithmic test signal that differs from the input serial bit stream received by the receiver.