Patents by Inventor Michael A. Parent

Michael A. Parent has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190276290
    Abstract: An apparatus for transporting an object is provided. The apparatus includes a mast and a carriage. The mast transitions between a first position defined by a first angle of incidence of the mast with a surface that supports the mast, and a second position defined by a second angle of incidence of the mast with the surface. The carriage traverses the mast and has one or more connectors that selectively secure the object to the carriage. The mast and the carriage are operative to transport the object along the surface when the mast is in the first position, and to facilitate engagement and disengagement of the one or more connectors with the object when the mast is in the second position.
    Type: Application
    Filed: March 9, 2018
    Publication date: September 12, 2019
    Applicant: C.A. PARENT DESIGN, LLC
    Inventors: CHRISTOPHER A. PARENT, MICHAEL L. ZANGA, THOMAS G. FERGUSON
  • Publication number: 20140162533
    Abstract: Cutting tools and machining methods using cutting tools are disclosed. An example cutting tool comprises a shank and a head on the shank, the head comprising a diamond abrasive-coated cutting surface, the cutting head having grooves interrupting the cutting surface and extending from the cutting surface toward an axis of rotation of the head, the cutting surface having a substantially constant radius.
    Type: Application
    Filed: February 17, 2014
    Publication date: June 12, 2014
    Applicant: The Boeing Company
    Inventors: David Odendahl, Michael Parent, Alan Glasscock, Craig Charlton, Peter Bui, Loren Fiske, Danny Lee Beaman
  • Patent number: 8655480
    Abstract: An automated filler production method includes obtaining gap measurement data by measuring a gap between component parts of a structure, delivering the gap measurement data to a data collector function, monitoring incoming filler requirements, updating solid model definitions of the filler, creating portable Machine Control Data (MCD) using the gap measurement data in the form of the updated solid model, delivering the MCD to a filler machining center and machining a filler from a filler substrate using the MCD, while providing status updates as the data progresses through the filler machining process.
    Type: Grant
    Filed: January 10, 2011
    Date of Patent: February 18, 2014
    Assignee: The Boeing Company
    Inventors: David Odendahl, Michael Parent, Alan Glasscock, Craig Charlton, Peter Bui, Loren Fiske, Danny Lee Beaman
  • Patent number: 8269550
    Abstract: A reference voltage generation circuit for generating a reference voltage that can adaptively depend on temperature and process includes: a comparator, having a process, temperature and voltage (PVT) insensitive reference as a first input, and a feedback of the output as a second input, for generating a voltage reference output; a first resistor, coupled to the output of the operational amplifier; a second and a third variable resistor coupled in parallel, and coupled between the first resistor and ground; and a transistor, coupled between the third variable resistor and ground.
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: September 18, 2012
    Assignee: Nanya Technology Corp.
    Inventors: Ryan Andrew Jurasek, Richard Michael Parent
  • Patent number: 8102690
    Abstract: A chip system that has reduced power consumption under specific operational modes includes: a DDR3 chip that includes: a plurality of pads, disposed at the center of the DDR3 chip; and an array of banks, each bank having a specific logical address, surrounding the pads. The chip system further includes: a clock, coupled to the DDR3 chip, for controlling a rate of data transmission; and a memory controller, coupled to the clock, for coordinating transmitted data with relevant processes, and for selectively reassigning the bank logical addresses according to a specific operational mode.
    Type: Grant
    Filed: October 12, 2009
    Date of Patent: January 24, 2012
    Assignee: Nanya Technology Corp.
    Inventors: Richard Michael Parent, Ryan Andrew Jurasek, Dave Eugene Chapmen
  • Patent number: 7940549
    Abstract: The configurations of a DRAM positive wordline voltage compensation device and a voltage compensating method thereof are provided in the present invention. The proposed device includes a comparator having a first input terminal receiving a positive wordline voltage feedback signal, a second input terminal receiving a compensating reference of array device threshold voltage and an output terminal generating a first enable signal, an oscillator receiving the first enable signal and generating an oscillating signal when the first enable signal is active and a charge pump having a first input terminal receiving a second enable signal, a second input terminal receiving the oscillating signal and an output terminal generating a positive wordline voltage being a sum of a bitline high voltage, an array device threshold voltage and a voltage margin.
    Type: Grant
    Filed: October 5, 2009
    Date of Patent: May 10, 2011
    Assignee: Nanya Technology Corp.
    Inventors: Benjamin James Stembridge, Ryan Andrew Jurasek, Richard Michael Parent
  • Publication number: 20110102057
    Abstract: A reference voltage generation circuit for generating a reference voltage that can adaptively depend on temperature and process includes: a comparator, having a process, temperature and voltage (PVT) insensitive reference as a first input, and a feedback of the output as a second input, for generating a voltage reference output; a first resistor, coupled to the output of the operational amplifier; a second and a third variable resistor coupled in parallel, and coupled between the first resistor and ground; and a transistor, coupled between the third variable resistor and ground.
    Type: Application
    Filed: November 2, 2009
    Publication date: May 5, 2011
    Inventors: Ryan Andrew Jurasek, Richard Michael Parent
  • Publication number: 20110085402
    Abstract: A chip system that has reduced power consumption under specific operational modes includes: a DDR3 chip that includes: a plurality of pads, disposed at the centre of the DDR3 chip; and an array of banks, each bank having a specific logical address, surrounding the pads. The chip system further includes: a clock, coupled to the DDR3 chip, for controlling a rate of data transmission; and a memory controller, coupled to the clock, for coordinating transmitted data with relevant processes, and for selectively reassigning the bank logical addresses according to a specific operational mode.
    Type: Application
    Filed: October 12, 2009
    Publication date: April 14, 2011
    Inventors: Richard Michael Parent, Ryan Andrew Jurasek, Dave Eugene Chapmen
  • Publication number: 20110080771
    Abstract: The configurations of a DRAM positive wordline voltage compensation device and a voltage compensating method thereof are provided in the present invention. The proposed device includes a comparator having a first input terminal receiving a positive wordline voltage feedback signal, a second input terminal receiving a compensating reference of array device threshold voltage and an output terminal generating a first enable signal, an oscillator receiving the first enable signal and generating an oscillating signal when the first enable signal is active and a charge pump having a first input terminal receiving a second enable signal, a second input terminal receiving the oscillating signal and an output terminal generating a positive wordline voltage being a sum of a bitline high voltage, an array device threshold voltage and a voltage margin.
    Type: Application
    Filed: October 5, 2009
    Publication date: April 7, 2011
    Applicant: NANYA TECHNOLOGY CORP.
    Inventors: Benjamin James STEMBRIDGE, Ryan Andrew JURASEK, Richard Michael PARENT
  • Patent number: 7876612
    Abstract: A method for reducing leakage current of a memory device includes supplying a first voltage to a main wordline driver, supplying a second voltage greater than the first voltage to a local wordline driver, and employing a transistor in the local wordline driver with a threshold voltage greater than a specific value.
    Type: Grant
    Filed: October 8, 2008
    Date of Patent: January 25, 2011
    Assignee: Nanya Technology Corp.
    Inventor: Richard Michael Parent
  • Patent number: 7813209
    Abstract: A method for reducing power consumption in a volatile memory includes switching off a bitline voltage provider according to a leakage control signal when a bitline array corresponding to the bitline voltage provider is dysfunctional due to a wordline to bitline short, controlling connections between a plurality of first bitline arrays corresponding to the bitline voltage provider and a plurality of sense amplifiers according to an access control signal, controlling connections between a plurality of second bitline arrays corresponding to the plurality of first bitline arrays and the plurality of sense amplifiers according to the access control signal, and providing power to the plurality of corresponding sense amplifiers according to the access control signal.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: October 12, 2010
    Assignee: Nanya Technology Corp.
    Inventor: Richard Michael Parent
  • Publication number: 20100085828
    Abstract: A method for reducing leakage current of a memory device includes supplying a first voltage to a main wordline driver, supplying a second voltage greater than the first voltage to a local wordline driver, and employing a transistor in the local wordline driver with a threshold voltage greater than a specific value.
    Type: Application
    Filed: October 8, 2008
    Publication date: April 8, 2010
    Inventor: Richard Michael Parent
  • Publication number: 20100080070
    Abstract: A method for reducing power consumption in a volatile memory includes switching off a bitline voltage provider according to a leakage control signal when a bitline array corresponding to the bitline voltage provider is dysfunctional due to a wordline to bitline short, controlling connections between a plurality of first bitline arrays corresponding to the bitline voltage provider and a plurality of sense amplifiers according to an access control signal, controlling connections between a plurality of second bitline arrays corresponding to the plurality of first bitline arrays and the plurality of sense amplifiers according to the access control signal, and providing power to the plurality of corresponding sense amplifiers according to the access control signal.
    Type: Application
    Filed: October 1, 2008
    Publication date: April 1, 2010
    Inventor: Richard Michael Parent
  • Publication number: 20080078747
    Abstract: Described are anionic N-substituted fluorinated sulfonamide surfactants, and use thereof in cleaning and in acid etch solutions. The cleaning and etch solutions are used with a wide variety of substrates, for example, in the cleaning and etching of silicon oxide-containing substrates.
    Type: Application
    Filed: October 3, 2007
    Publication date: April 3, 2008
    Inventors: Patricia Savu, William Lamanna, Michael Parent
  • Patent number: 7239244
    Abstract: A system for monitoring a portable article. The system has a housing, a detectable signal generator on the housing, a detection circuit on the housing, and a jumper element having first and second ends. The jumper element has a) an operative state wherein the first and second jumper element ends are electrically connected to the detection circuit at first and second locations and the jumper element defines a conductive path electrically connecting between the first and second locations on the detection circuit and b) a disabled state. In the disabled state, one of i) the first end of the jumper element is disconnected from the detection circuit at the first location ii) the second end of the jumper element is disconnected from the detection circuit at the second location and iii) the jumper element is severed between the first and second ends, so that the conductive path between the first and second locations is interrupted.
    Type: Grant
    Filed: April 22, 2005
    Date of Patent: July 3, 2007
    Assignee: Se-Kure Controls, Inc.
    Inventors: Roger J. Leyden, Michael Parent
  • Publication number: 20070142512
    Abstract: A coatable composition that comprises water, a film-forming organic polymer, and a leveling agent comprising an anionic species represented by the formula wherein Rf represents a perfluoroalkyl group having from 4 to 6 carbon atoms, and R represents H or an alkyl group having from 1 to 18 carbon atoms.
    Type: Application
    Filed: December 21, 2005
    Publication date: June 21, 2007
    Inventors: Patricia Savu, Michael Parent, William Lamanna
  • Patent number: 7187283
    Abstract: The combination of a portable article, a first support assembly, and a tethering system. The first support assembly has at least a first connecting element for maintaining the portable article in a secured state relative to the first support assembly. The tethering system connects to the first support assembly and is connectable to a base/support. The tethering system prevents the first support assembly from being moved beyond a predetermined range from a base/support to which the tethering system is connected. The combination further includes an alarm system.
    Type: Grant
    Filed: October 13, 2004
    Date of Patent: March 6, 2007
    Assignee: Se-Kure Controls, Inc.
    Inventors: Roger Leyden, Michael Parent, Bjarne Fredericksen
  • Publication number: 20060238343
    Abstract: A system for monitoring a portable article. The system has a housing, a detectable signal generator on the housing, a detection circuit on the housing, and a jumper element having first and second ends. The jumper element has a) an operative state wherein the first and second jumper element ends are electrically connected to the detection circuit at first and second locations and the jumper element defines a conductive path electrically connecting between the first and second locations on the detection circuit and b) a disabled state. In the disabled state, one of i) the first end of the jumper element is disconnected from the detection circuit at the first location ii) the second end of the jumper element is disconnected from the detection circuit at the second location and iii) the jumper element is severed between the first and second ends, so that the conductive path between the first and second locations is interrupted.
    Type: Application
    Filed: April 22, 2005
    Publication date: October 26, 2006
    Inventors: Roger Leyden, Michael Parent
  • Publication number: 20050206522
    Abstract: The combination of a portable article, a first support assembly, and a tethering system. The first support assembly has at least a first connecting element for maintaining the portable article in a secured state relative to the first support assembly. The tethering system connects to the first support assembly and is connectable to a base/support. The tethering system prevents the first support assembly from being moved beyond a predetermined range from a base/support to which the tethering system is connected. The combination further includes an alarm system.
    Type: Application
    Filed: October 13, 2004
    Publication date: September 22, 2005
    Inventors: Roger Leyden, Michael Parent, Bjarne Fredericksen
  • Publication number: 20050197273
    Abstract: Described are anionic N-substituted fluorinated sulfonamide surfactants, and use thereof in cleaning and in acid etch solutions. The cleaning and etch solutions are used with a wide variety of substrates, for example, in the cleaning and etching of silicon oxide-containing substrates.
    Type: Application
    Filed: March 3, 2004
    Publication date: September 8, 2005
    Inventors: Patricia Savu, William Lamanna, Michael Parent