Patents by Inventor Michael A. Parent
Michael A. Parent has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240095877Abstract: Features described herein generally relate to providing spatiotemporal guidance within a 360-degree video. Particularly, while a 360-degree video is being displayed to a user, a current location of the view of the user within the 360-degree video is determined. Additionally, regions of interest may be identified within the 360-degree video, along with their location and a time in which the regions of interest are active within the 360-degree video. A visual guide is then overlaid onto the 360-degree video that indicates a current location of the view of the user, as well as locations of one or more regions of interest, as well as the time during which each region of interest is active (able to be viewed) within the 360-degree video. By viewing the visual guide, the user may be able to anticipate a location and timing of regions of interest within the 360-degree video and adjust their gaze to the correct location at the correct time to view such regions of interest.Type: ApplicationFiled: January 31, 2023Publication date: March 21, 2024Applicant: Meta Platforms Technologies, LLCInventors: Sean LIU, Rorik HENRIKSON, Mark PARENT, Michael GLUECK, Tovi GROSSMAN
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Publication number: 20140162533Abstract: Cutting tools and machining methods using cutting tools are disclosed. An example cutting tool comprises a shank and a head on the shank, the head comprising a diamond abrasive-coated cutting surface, the cutting head having grooves interrupting the cutting surface and extending from the cutting surface toward an axis of rotation of the head, the cutting surface having a substantially constant radius.Type: ApplicationFiled: February 17, 2014Publication date: June 12, 2014Applicant: The Boeing CompanyInventors: David Odendahl, Michael Parent, Alan Glasscock, Craig Charlton, Peter Bui, Loren Fiske, Danny Lee Beaman
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Patent number: 8655480Abstract: An automated filler production method includes obtaining gap measurement data by measuring a gap between component parts of a structure, delivering the gap measurement data to a data collector function, monitoring incoming filler requirements, updating solid model definitions of the filler, creating portable Machine Control Data (MCD) using the gap measurement data in the form of the updated solid model, delivering the MCD to a filler machining center and machining a filler from a filler substrate using the MCD, while providing status updates as the data progresses through the filler machining process.Type: GrantFiled: January 10, 2011Date of Patent: February 18, 2014Assignee: The Boeing CompanyInventors: David Odendahl, Michael Parent, Alan Glasscock, Craig Charlton, Peter Bui, Loren Fiske, Danny Lee Beaman
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Patent number: 8269550Abstract: A reference voltage generation circuit for generating a reference voltage that can adaptively depend on temperature and process includes: a comparator, having a process, temperature and voltage (PVT) insensitive reference as a first input, and a feedback of the output as a second input, for generating a voltage reference output; a first resistor, coupled to the output of the operational amplifier; a second and a third variable resistor coupled in parallel, and coupled between the first resistor and ground; and a transistor, coupled between the third variable resistor and ground.Type: GrantFiled: November 2, 2009Date of Patent: September 18, 2012Assignee: Nanya Technology Corp.Inventors: Ryan Andrew Jurasek, Richard Michael Parent
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Patent number: 8102690Abstract: A chip system that has reduced power consumption under specific operational modes includes: a DDR3 chip that includes: a plurality of pads, disposed at the center of the DDR3 chip; and an array of banks, each bank having a specific logical address, surrounding the pads. The chip system further includes: a clock, coupled to the DDR3 chip, for controlling a rate of data transmission; and a memory controller, coupled to the clock, for coordinating transmitted data with relevant processes, and for selectively reassigning the bank logical addresses according to a specific operational mode.Type: GrantFiled: October 12, 2009Date of Patent: January 24, 2012Assignee: Nanya Technology Corp.Inventors: Richard Michael Parent, Ryan Andrew Jurasek, Dave Eugene Chapmen
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Patent number: 7940549Abstract: The configurations of a DRAM positive wordline voltage compensation device and a voltage compensating method thereof are provided in the present invention. The proposed device includes a comparator having a first input terminal receiving a positive wordline voltage feedback signal, a second input terminal receiving a compensating reference of array device threshold voltage and an output terminal generating a first enable signal, an oscillator receiving the first enable signal and generating an oscillating signal when the first enable signal is active and a charge pump having a first input terminal receiving a second enable signal, a second input terminal receiving the oscillating signal and an output terminal generating a positive wordline voltage being a sum of a bitline high voltage, an array device threshold voltage and a voltage margin.Type: GrantFiled: October 5, 2009Date of Patent: May 10, 2011Assignee: Nanya Technology Corp.Inventors: Benjamin James Stembridge, Ryan Andrew Jurasek, Richard Michael Parent
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Publication number: 20110102057Abstract: A reference voltage generation circuit for generating a reference voltage that can adaptively depend on temperature and process includes: a comparator, having a process, temperature and voltage (PVT) insensitive reference as a first input, and a feedback of the output as a second input, for generating a voltage reference output; a first resistor, coupled to the output of the operational amplifier; a second and a third variable resistor coupled in parallel, and coupled between the first resistor and ground; and a transistor, coupled between the third variable resistor and ground.Type: ApplicationFiled: November 2, 2009Publication date: May 5, 2011Inventors: Ryan Andrew Jurasek, Richard Michael Parent
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Publication number: 20110085402Abstract: A chip system that has reduced power consumption under specific operational modes includes: a DDR3 chip that includes: a plurality of pads, disposed at the centre of the DDR3 chip; and an array of banks, each bank having a specific logical address, surrounding the pads. The chip system further includes: a clock, coupled to the DDR3 chip, for controlling a rate of data transmission; and a memory controller, coupled to the clock, for coordinating transmitted data with relevant processes, and for selectively reassigning the bank logical addresses according to a specific operational mode.Type: ApplicationFiled: October 12, 2009Publication date: April 14, 2011Inventors: Richard Michael Parent, Ryan Andrew Jurasek, Dave Eugene Chapmen
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Publication number: 20110080771Abstract: The configurations of a DRAM positive wordline voltage compensation device and a voltage compensating method thereof are provided in the present invention. The proposed device includes a comparator having a first input terminal receiving a positive wordline voltage feedback signal, a second input terminal receiving a compensating reference of array device threshold voltage and an output terminal generating a first enable signal, an oscillator receiving the first enable signal and generating an oscillating signal when the first enable signal is active and a charge pump having a first input terminal receiving a second enable signal, a second input terminal receiving the oscillating signal and an output terminal generating a positive wordline voltage being a sum of a bitline high voltage, an array device threshold voltage and a voltage margin.Type: ApplicationFiled: October 5, 2009Publication date: April 7, 2011Applicant: NANYA TECHNOLOGY CORP.Inventors: Benjamin James STEMBRIDGE, Ryan Andrew JURASEK, Richard Michael PARENT
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Patent number: 7876612Abstract: A method for reducing leakage current of a memory device includes supplying a first voltage to a main wordline driver, supplying a second voltage greater than the first voltage to a local wordline driver, and employing a transistor in the local wordline driver with a threshold voltage greater than a specific value.Type: GrantFiled: October 8, 2008Date of Patent: January 25, 2011Assignee: Nanya Technology Corp.Inventor: Richard Michael Parent
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Patent number: 7813209Abstract: A method for reducing power consumption in a volatile memory includes switching off a bitline voltage provider according to a leakage control signal when a bitline array corresponding to the bitline voltage provider is dysfunctional due to a wordline to bitline short, controlling connections between a plurality of first bitline arrays corresponding to the bitline voltage provider and a plurality of sense amplifiers according to an access control signal, controlling connections between a plurality of second bitline arrays corresponding to the plurality of first bitline arrays and the plurality of sense amplifiers according to the access control signal, and providing power to the plurality of corresponding sense amplifiers according to the access control signal.Type: GrantFiled: October 1, 2008Date of Patent: October 12, 2010Assignee: Nanya Technology Corp.Inventor: Richard Michael Parent
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Publication number: 20100085828Abstract: A method for reducing leakage current of a memory device includes supplying a first voltage to a main wordline driver, supplying a second voltage greater than the first voltage to a local wordline driver, and employing a transistor in the local wordline driver with a threshold voltage greater than a specific value.Type: ApplicationFiled: October 8, 2008Publication date: April 8, 2010Inventor: Richard Michael Parent
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Publication number: 20100080070Abstract: A method for reducing power consumption in a volatile memory includes switching off a bitline voltage provider according to a leakage control signal when a bitline array corresponding to the bitline voltage provider is dysfunctional due to a wordline to bitline short, controlling connections between a plurality of first bitline arrays corresponding to the bitline voltage provider and a plurality of sense amplifiers according to an access control signal, controlling connections between a plurality of second bitline arrays corresponding to the plurality of first bitline arrays and the plurality of sense amplifiers according to the access control signal, and providing power to the plurality of corresponding sense amplifiers according to the access control signal.Type: ApplicationFiled: October 1, 2008Publication date: April 1, 2010Inventor: Richard Michael Parent
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Publication number: 20080078747Abstract: Described are anionic N-substituted fluorinated sulfonamide surfactants, and use thereof in cleaning and in acid etch solutions. The cleaning and etch solutions are used with a wide variety of substrates, for example, in the cleaning and etching of silicon oxide-containing substrates.Type: ApplicationFiled: October 3, 2007Publication date: April 3, 2008Inventors: Patricia Savu, William Lamanna, Michael Parent
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Patent number: 7239244Abstract: A system for monitoring a portable article. The system has a housing, a detectable signal generator on the housing, a detection circuit on the housing, and a jumper element having first and second ends. The jumper element has a) an operative state wherein the first and second jumper element ends are electrically connected to the detection circuit at first and second locations and the jumper element defines a conductive path electrically connecting between the first and second locations on the detection circuit and b) a disabled state. In the disabled state, one of i) the first end of the jumper element is disconnected from the detection circuit at the first location ii) the second end of the jumper element is disconnected from the detection circuit at the second location and iii) the jumper element is severed between the first and second ends, so that the conductive path between the first and second locations is interrupted.Type: GrantFiled: April 22, 2005Date of Patent: July 3, 2007Assignee: Se-Kure Controls, Inc.Inventors: Roger J. Leyden, Michael Parent
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Publication number: 20070142512Abstract: A coatable composition that comprises water, a film-forming organic polymer, and a leveling agent comprising an anionic species represented by the formula wherein Rf represents a perfluoroalkyl group having from 4 to 6 carbon atoms, and R represents H or an alkyl group having from 1 to 18 carbon atoms.Type: ApplicationFiled: December 21, 2005Publication date: June 21, 2007Inventors: Patricia Savu, Michael Parent, William Lamanna
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Patent number: 7187283Abstract: The combination of a portable article, a first support assembly, and a tethering system. The first support assembly has at least a first connecting element for maintaining the portable article in a secured state relative to the first support assembly. The tethering system connects to the first support assembly and is connectable to a base/support. The tethering system prevents the first support assembly from being moved beyond a predetermined range from a base/support to which the tethering system is connected. The combination further includes an alarm system.Type: GrantFiled: October 13, 2004Date of Patent: March 6, 2007Assignee: Se-Kure Controls, Inc.Inventors: Roger Leyden, Michael Parent, Bjarne Fredericksen
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Publication number: 20060238343Abstract: A system for monitoring a portable article. The system has a housing, a detectable signal generator on the housing, a detection circuit on the housing, and a jumper element having first and second ends. The jumper element has a) an operative state wherein the first and second jumper element ends are electrically connected to the detection circuit at first and second locations and the jumper element defines a conductive path electrically connecting between the first and second locations on the detection circuit and b) a disabled state. In the disabled state, one of i) the first end of the jumper element is disconnected from the detection circuit at the first location ii) the second end of the jumper element is disconnected from the detection circuit at the second location and iii) the jumper element is severed between the first and second ends, so that the conductive path between the first and second locations is interrupted.Type: ApplicationFiled: April 22, 2005Publication date: October 26, 2006Inventors: Roger Leyden, Michael Parent
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Publication number: 20050206522Abstract: The combination of a portable article, a first support assembly, and a tethering system. The first support assembly has at least a first connecting element for maintaining the portable article in a secured state relative to the first support assembly. The tethering system connects to the first support assembly and is connectable to a base/support. The tethering system prevents the first support assembly from being moved beyond a predetermined range from a base/support to which the tethering system is connected. The combination further includes an alarm system.Type: ApplicationFiled: October 13, 2004Publication date: September 22, 2005Inventors: Roger Leyden, Michael Parent, Bjarne Fredericksen
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Publication number: 20050197273Abstract: Described are anionic N-substituted fluorinated sulfonamide surfactants, and use thereof in cleaning and in acid etch solutions. The cleaning and etch solutions are used with a wide variety of substrates, for example, in the cleaning and etching of silicon oxide-containing substrates.Type: ApplicationFiled: March 3, 2004Publication date: September 8, 2005Inventors: Patricia Savu, William Lamanna, Michael Parent