Patents by Inventor Michael A. Sperling

Michael A. Sperling has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10644497
    Abstract: Embodiments include a technique for using a charge pump for a distributed voltage passgate with high voltage protection. The technique includes receiving a reference signal, and preventing the reference signal from passing through a passgate to a circuit, wherein the passgate is an NFET passgate. The technique also includes charging the passgate using a charge pump circuit above the reference signal, and regulating the charge pump circuit using a clock signal. The technique also includes controlling the passgate based at least in part on the charge pump circuit.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: May 5, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kennedy K. Cheruiyot, Paul D. Muench, Michael A. Sperling, Michael R. Whalen
  • Patent number: 10601216
    Abstract: An analog multiplexer includes a plurality of voltage-protecting transmission gate circuits to select an input voltage signal among different input signals. Each voltage-protecting transmission gate circuit includes a pass gate pFET interconnected between an input pFET and an output pFET, as well as a parallel pass gate nFET. The pFET includes a first source/drain connected in series with the input pFET. A second source/drain is connected in series with the output pFET. A pFET gate receives a gate select signal that operates the transmission gate circuit in a blocking mode, a first passing mode, or a second passing mode. The nFET includes a first nFET source/drain connected to the input pFET to form a main input terminal that receives the input voltage signal. A second nFET source/drain is connected to the output pFET to form a main output terminal that outputs an output voltage based on the operating mode.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: March 24, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Paul D. Muench, Miguel E. Perez, George E. Smith, III, Michael A. Sperling
  • Publication number: 20180337669
    Abstract: Embodiments include a technique for using a charge pump for a distributed voltage passgate with high voltage protection. The technique includes receiving a reference signal, and preventing the reference signal from passing through a passgate to a circuit, wherein the passgate is an NFET passgate. The technique also includes charging the passgate using a charge pump circuit above the reference signal, and regulating the charge pump circuit using a clock signal. The technique also includes controlling the passgate based at least in part on the charge pump circuit.
    Type: Application
    Filed: May 17, 2017
    Publication date: November 22, 2018
    Inventors: Kennedy K. Cheruiyot, Paul D. Muench, Michael A. Sperling, Michael R. Whalen
  • Patent number: 10069409
    Abstract: A distributed voltage regulator includes multiple micro-regulators disposed in a corresponding set of circuit sectors of an integrated circuit. Each micro-regulator provides current to the corresponding circuit sector at a current injection point. The regulator also includes a control module configured to receive feedback signals corresponding to a one or more sense points within each circuit sector and provide a control signal to each micro-regulator. The control module limits load-sharing imbalance within the plurality of micro-regulators. A voltage regulator with multiple sense points includes a micro-regulator that provides current at a current injection point, and a control module that receives feedback signals corresponding to a plurality of sense points and provides a control signal to the micro-regulator. The micro-regulator may comprise a charge pump that provides a local reference voltage that enables the micro-regulator to suppress local voltage drooping during feedback transitions (e.g.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: September 4, 2018
    Assignee: International Business Machines Corporation
    Inventors: John F. Bulzacchelli, Michael A. Sperling, Zeynep Toprak Deniz
  • Patent number: 10033270
    Abstract: An apparatus for providing a local reference voltage for a voltage regulator includes a reference capacitor configured to provide the local reference voltage, a charge pump configured to push current to, or pull current from, the reference capacitor according to one or more control inputs received by the charge pump, and a boosting circuit configured to add or subtract a discrete quantity of charge to the reference capacitor according to one or more boosting control signals. A boosting control circuit may be configured to disconnect a boosting capacitor from the reference capacitor during a first phase of a control cycle and connect the boosting capacitor to the reference capacitor during a second phase of the control cycle. The boosting capacitor may be pre-charged (to add charge) or discharged (to subtract charge) during the first phase of the control cycle. A corresponding method is also disclosed herein.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: July 24, 2018
    Assignee: International Business Machines Corporation
    Inventors: John F. Bulzacchelli, Seongwon Kim, Michael A. Sperling, Zeynep Toprak Deniz
  • Publication number: 20180175608
    Abstract: An analog multiplexer includes a plurality of voltage-protecting transmission gate circuits to select an input voltage signal among different input signals. Each voltage-protecting transmission gate circuit includes a pass gate pFET interconnected between an input pFET and an output pFET, as well as a parallel pass gate nFET. The pFET includes a first source/drain connected in series with the input pFET. A second source/drain is connected in series with the output pFET. A pFET gate receives a gate select signal that operates the transmission gate circuit in a blocking mode, a first passing mode, or a second passing mode. The nFET includes a first nFET source/drain connected to the input pFET to form a main input terminal that receives the input voltage signal. A second nFET source/drain is connected to the output pFET to form a main output terminal that outputs an output voltage based on the operating mode.
    Type: Application
    Filed: December 15, 2016
    Publication date: June 21, 2018
    Inventors: Paul D. Muench, Miguel E. Perez, George E. Smith, III, Michael A. Sperling
  • Publication number: 20180115238
    Abstract: An apparatus for providing a local reference voltage for a voltage regulator includes a reference capacitor configured to provide the local reference voltage, a charge pump configured to push current to, or pull current from, the reference capacitor according to one or more control inputs received by the charge pump, and a boosting circuit configured to add or subtract a discrete quantity of charge to the reference capacitor according to one or more boosting control signals. A boosting control circuit may be configured to disconnect a boosting capacitor from the reference capacitor during a first phase of a control cycle and connect the boosting capacitor to the reference capacitor during a second phase of the control cycle. The boosting capacitor may be pre-charged (to add charge) or discharged (to subtract charge) during the first phase of the control cycle. A corresponding method is also disclosed herein.
    Type: Application
    Filed: October 26, 2016
    Publication date: April 26, 2018
    Inventors: John F. Bulzacchelli, Seongwon Kim, Michael A. Sperling, Zeynep Toprak Deniz
  • Publication number: 20180076708
    Abstract: A distributed voltage regulator includes multiple micro-regulators disposed in a corresponding set of circuit sectors of an integrated circuit. Each micro-regulator provides current to the corresponding circuit sector at a current injection point. The regulator also includes a control module configured to receive feedback signals corresponding to a one or more sense points within each circuit sector and provide a control signal to each micro-regulator. The control module limits load-sharing imbalance within the plurality of micro-regulators. A voltage regulator with multiple sense points includes a micro-regulator that provides current at a current injection point, and a control module that receives feedback signals corresponding to a plurality of sense points and provides a control signal to the micro-regulator. The micro-regulator may comprise a charge pump that provides a local reference voltage that enables the micro-regulator to suppress local voltage drooping during feedback transitions (e.g.
    Type: Application
    Filed: September 13, 2016
    Publication date: March 15, 2018
    Inventors: John F. Bulzacchelli, Michael A. Sperling, Zeynep Toprak Deniz
  • Patent number: 9882552
    Abstract: A phase-locked loop (PLL) circuit, sense amplifier circuit, and method of operating a sense amplifier circuit are disclosed. The sense amplifier circuit comprises first and second operational amplifiers, each operational amplifier respectively comprising a non-inverting input terminal, an inverting input terminal, and an output stage comprising a current gating circuit having two current gating input terminals, the output stage coupled with an output terminal, the output terminal providing a feedback signal to the inverting input terminal. The input voltage signal is received across the non-inverting input terminals of the first and second operational amplifiers, and is received across the two current gating input terminals of each of the first and second operational amplifiers, wherein the sense amplifier circuit generates a sense voltage signal across the output terminals of the first and second operational amplifiers.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: January 30, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David M. Friend, Grant P. Kesselring, Michael A. Sperling, James D. Strom
  • Patent number: 9871527
    Abstract: A phase-locked loop (PLL) circuit, sense amplifier circuit, and method of operating a sense amplifier circuit are disclosed. The sense amplifier circuit comprises first and second operational amplifiers, each operational amplifier respectively comprising a non-inverting input terminal, an inverting input terminal, and an output stage comprising a current gating circuit having two current gating input terminals, the output stage coupled with an output terminal, the output terminal providing a feedback signal to the inverting input terminal. The input voltage signal is received across the non-inverting input terminals of the first and second operational amplifiers, and is received across the two current gating input terminals of each of the first and second operational amplifiers, wherein the sense amplifier circuit generates a sense voltage signal across the output terminals of the first and second operational amplifiers.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: January 16, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David M. Friend, Grant P. Kesselring, Michael A. Sperling, James D. Strom
  • Publication number: 20170141781
    Abstract: A phase-locked loop (PLL) circuit, sense amplifier circuit, and method of operating a sense amplifier circuit are disclosed. The sense amplifier circuit comprises first and second operational amplifiers, each operational amplifier respectively comprising a non-inverting input terminal, an inverting input terminal, and an output stage comprising a current gating circuit having two current gating input terminals, the output stage coupled with an output terminal, the output terminal providing a feedback signal to the inverting input terminal. The input voltage signal is received across the non-inverting input terminals of the first and second operational amplifiers, and is received across the two current gating input terminals of each of the first and second operational amplifiers, wherein the sense amplifier circuit generates a sense voltage signal across the output terminals of the first and second operational amplifiers.
    Type: Application
    Filed: January 30, 2017
    Publication date: May 18, 2017
    Inventors: David M. FRIEND, Grant P. KESSELRING, Michael A. SPERLING, James D. STROM
  • Publication number: 20170093383
    Abstract: A phase-locked loop (PLL) circuit, sense amplifier circuit, and method of operating a sense amplifier circuit are disclosed. The sense amplifier circuit comprises first and second operational amplifiers, each operational amplifier respectively comprising a non-inverting input terminal, an inverting input terminal, and an output stage comprising a current gating circuit having two current gating input terminals, the output stage coupled with an output terminal, the output terminal providing a feedback signal to the inverting input terminal. The input voltage signal is received across the non-inverting input terminals of the first and second operational amplifiers, and is received across the two current gating input terminals of each of the first and second operational amplifiers, wherein the sense amplifier circuit generates a sense voltage signal across the output terminals of the first and second operational amplifiers.
    Type: Application
    Filed: September 25, 2015
    Publication date: March 30, 2017
    Inventors: David M. FRIEND, Grant P. KESSELRING, Michael A. SPERLING, James D. STROM
  • Patent number: 9341655
    Abstract: A method for operating a charge pump that supplies switching current for a plurality of transistors includes a capacitor generating a pumped voltage. A comparator generates a pump control signal for turning on and off charging of the pump capacitor based on a difference between a comparison voltage and a reference voltage. A direct voltage sensor receives a feedback signal reflecting the pumped voltage and generates the comparison voltage in response to the feedback signal. The sensor includes a sensor resistor, a current source configured to drive a sensor current through the sensor resistor, and a differential op-amp that drives the sensor current to cause the voltage drop across the sensor resistor to remain constant as the pumped voltage experiences the voltage drop. The charge pump may include two similar direct voltage sensor controlling positive and negative pumped voltages.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: May 17, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Paul D. Muench, Donald W. Plass, Michael A. Sperling
  • Patent number: 9250271
    Abstract: Embodiments relate to a direct voltage sensor and a charge pump system for a computer system. A charge pump that supplies switching current for a plurality of transistors includes a capacitor generating a pumped voltage. A comparator generates a pump control signal for turning on and off charging of the pump capacitor based on a difference between a comparison voltage and a reference voltage. A direct voltage sensor receives a feedback signal reflecting the pumped voltage and generates the comparison voltage in response to the feedback signal. The sensor includes a sensor resistor, a current source configured to drive a sensor current through the sensor resistor, and a differential op-amp that drives the sensor current to cause the voltage drop across the sensor resistor to remain constant as the pumped voltage experiences the voltage drop. The charge pump may include two similar direct voltage sensor controlling positive and negative pumped voltages.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: February 2, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Paul D. Muench, Donald W. Plass, Michael A. Sperling
  • Publication number: 20150054572
    Abstract: A method for operating a charge pump that supplies switching current for a plurality of transistors includes a capacitor generating a pumped voltage. A comparator generates a pump control signal for turning on and off charging of the pump capacitor based on a difference between a comparison voltage and a reference voltage. A direct voltage sensor receives a feedback signal reflecting the pumped voltage and generates the comparison voltage in response to the feedback signal. The sensor includes a sensor resistor, a current source configured to drive a sensor current through the sensor resistor, and a differential op-amp that drives the sensor current to cause the voltage drop across the sensor resistor to remain constant as the pumped voltage experiences the voltage drop. The charge pump may include two similar direct voltage sensor controlling positive and negative pumped voltages.
    Type: Application
    Filed: September 30, 2014
    Publication date: February 26, 2015
    Inventors: Paul D. Muench, Donald W. Plass, Michael A. Sperling
  • Publication number: 20150054575
    Abstract: A system and method to regulate voltage on a chip are described. The system includes a central controller to output a digital code based on a voltage measurement from a sense point on a power grid of the chip. The system also includes a plurality of micro-regulators, each of the plurality of micro-regulators outputting a respective voltage to the power grid based on the digital code.
    Type: Application
    Filed: September 30, 2014
    Publication date: February 26, 2015
    Inventors: John F. Bulzacchelli, Paul D. Muench, Michael A. Sperling, Zeynep Toprak Deniz
  • Publication number: 20150054574
    Abstract: A system and method to regulate voltage on a chip are described. The system includes a central controller to output a digital code based on a voltage measurement from a sense point on a power grid of the chip. The system also includes a plurality of micro-regulators, each of the plurality of micro-regulators outputting a respective voltage to the power grid based on the digital code.
    Type: Application
    Filed: August 23, 2013
    Publication date: February 26, 2015
    Applicant: International Business Machines Corporation
    Inventors: John F. Bulzacchelli, Paul D. Muench, Michael A. Sperling, Zeynep Toprak Deniz
  • Publication number: 20150054493
    Abstract: Embodiments relate to a direct voltage sensor and a charge pump system for a computer system. A charge pump that supplies switching current for a plurality of transistors includes a capacitor generating a pumped voltage. A comparator generates a pump control signal for turning on and off charging of the pump capacitor based on a difference between a comparison voltage and a reference voltage. A direct voltage sensor receives a feedback signal reflecting the pumped voltage and generates the comparison voltage in response to the feedback signal. The sensor includes a sensor resistor, a current source configured to drive a sensor current through the sensor resistor, and a differential op-amp that drives the sensor current to cause the voltage drop across the sensor resistor to remain constant as the pumped voltage experiences the voltage drop. The charge pump may include two similar direct voltage sensor controlling positive and negative pumped voltages.
    Type: Application
    Filed: August 26, 2013
    Publication date: February 26, 2015
    Applicant: International Business Machines Corporation
    Inventors: Paul D. Muench, Donald W. Plass, Michael A. Sperling
  • Patent number: 8619979
    Abstract: Electronic devices and methods are disclosed to provide and to test a physically unclonable function (PUF) based on relative threshold voltages of one or more pairs of transistors. In a particular embodiment, an electronic device is operable to generate a response to a challenge. The electronic device includes a plurality of transistors, with each of the plurality of transistors having a threshold voltage substantially equal to an intended threshold voltage. The electronic device includes a challenge input configured to receive the challenge. The challenge input includes one or more bits that are used to individually select each of a pair of transistors of the plurality of transistors. The electronic device also includes a comparator to receive an output voltage from each of the pair of transistors and to generate a response indicating which of the pair of transistors has the higher output voltage.
    Type: Grant
    Filed: June 25, 2010
    Date of Patent: December 31, 2013
    Assignee: International Business Machines Corporation
    Inventors: Joel T. Ficke, William E. Hall, Terence B. Hook, Michael A. Sperling, Larry Wissel
  • Patent number: 8605489
    Abstract: A memory device includes memory cells, each of the memory cells having corresponding bit and word lines connected thereto for accessing the memory cells, a word line circuit coupled with at least one word line, and a bit line circuit coupled with at least one bit line. The memory device further includes at least one control circuit coupled with the bit and word line circuits. The control circuit is operative to cause state information to be stored in the memory cells. At least one switching element selectively connects the memory cells, the bit and word line circuits, and the control circuit to at least one power supply as a function of at least one control signal. The control circuit generates the control signal for disconnecting at least portions of the word line and bit line circuits from the power supply while state information is retained in the memory cells.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: December 10, 2013
    Assignee: International Business Machines Corporation
    Inventors: William Robert Reohr, Robert Kevin Montoye, Michael A Sperling