Abstract: Improved current doubling DC-DC converters having an efficient sleep mode. An illustrative converter embodiment includes: a transformer, first and second inductors coupled together at a first voltage output terminal, a reserve capacitor coupled to a second output voltage terminal, a primary switch array, a secondary switch array, and a controller. The first and second inductors each have a drive terminal coupled to a respective terminal of the transformer secondary. The primary switch array operates to convert an input voltage into forward voltage pulses and reverse voltage pulses on the transformer primary. The secondary switch array selectively couples the first inductor's drive terminal to either a charge terminal of the reserve capacitor or to the second voltage output terminal. The controller at least temporarily suspends operation of the primary switch array during a sleep mode, and uses the reserve capacitor to sustain a voltage at the first voltage output terminal.

Abstract: An illustrative current-doubling DC-DC conversion method includes: converting an input voltage into forward voltage pulses and reverse voltage pulses on a primary of a transformer having a secondary coupled between a drive terminal of a first inductor and a drive terminal of a second inductor, the first and second inductors each having a common terminal coupled to a first output voltage terminal; selectively coupling the first inductor's drive terminal to a charge terminal of a reserve capacitor or to a second output voltage terminal, the first inductor's drive terminal being coupled to the charge terminal at least during the forward voltage pulses; selectively coupling the second inductor's drive terminal to the charge terminal of the reserve capacitor or to the second output voltage terminal, the second inductor's drive terminal being coupled to the charge terminal at least during the reverse voltage pulses; and concurrently coupling the drive terminals of the first and second inductors to the charge termin

Abstract: In accordance with an embodiment, a converter includes a circuit and method for charging a bootstrap capacitor. The circuit monitors a voltage across the bootstrap capacitor and enables charging the bootstrap capacitor in response to the voltage across the bootstrap capacitor being less than a threshold voltage.

Abstract: A semiconductor component and a method for manufacturing the semiconductor component. In accordance with an embodiment, the semiconductor component includes a plurality of stacked semiconductor chips mounted to a support structure, wherein one semiconductor chip has a side with a plurality of electrical contacts electrically coupled to conductive tabs of the support structure. An electrical connector electrically connects an electrical contact formed from a side opposite the side with the plurality of electrical contacts to a corresponding conductive tab. Another semiconductor chip is mounted to the electrical connector and electrical contacts formed from this semiconductor chip are electrically connected to corresponding conductive tabs of the support structure.

Abstract: A semiconductor component and a method for manufacturing the semiconductor component. In accordance with an embodiment, the semiconductor component includes a plurality of stacked semiconductor chips mounted to a support structure, wherein one semiconductor chip has a side with a plurality of electrical contacts electrically coupled to conductive tabs of the support structure. An electrical connector electrically connects an electrical contact formed from a side opposite the side with the plurality of electrical contacts to a corresponding conductive tab. Another semiconductor chip is mounted to the electrical connector and electrical contacts formed from this semiconductor chip are electrically connected to corresponding conductive tabs of the support structure.

Abstract: A method for mitigating aliasing effects in a single phase power converter and mitigating aliasing effects and inhibiting thermal run-away in a multi-phase power converter at varying load transition rates. A single phase or multi-phase power converter having an on-time is provided and the frequency of the power converter is adjusted so that a load step period and the on time of the single phase power converter are in a temporal relationship. Alternatively, a load step rate is inhibited from locking onto a phase current of the single phase power converter by suspending an oscillator signal. In accordance with another alternative, a load step rate is inhibited from locking onto a phase current of the single phase power converter by suspending an oscillator signal and dithering an input signal to the oscillator.

Abstract: In accordance with an embodiment, a converter includes a circuit and method for scaling a drive signal. The converter determines the power at its input and scales a drive signal in accordance with the input power. In accordance with another embodiment the converter determines the power at its output and scales the drive signal in accordance with the output power.

Abstract: In accordance with an embodiment, a converter includes a circuit and method for charging a bootstrap capacitor. The circuit monitors a voltage across the bootstrap capacitor and enables charging the bootstrap capacitor in response to the voltage across the bootstrap capacitor being less than a threshold voltage.

Abstract: In accordance with an embodiment, a converter includes a circuit and method for scaling a drive signal. The converter determines the power at its input and scales a drive signal in accordance with the input power. In accordance with another embodiment the converter determines the power at its output and scales the drive signal in accordance with the output power.

Abstract: A method for method for inhibiting thermal run-away in a multi-phase power converter at varying load transition rates. A multi-phase power converter having an on-time is provided and the frequency of the multi-phase power converter is adjusted so that a load step period and the on time of the multi-phase power converter are in a temporal relationship. Alternatively, a load step rate is inhibited from locking onto a phase current of the multi-phase power converter by suspending an oscillator signal. In accordance with another alternative, a load step rate is inhibited from locking onto a phase current of the multi-phase power converter by suspending an oscillator signal and dithering an input signal to the oscillator.

Abstract: A method for mitigating aliasing effects in a single phase power converter and mitigating aliasing effects and inhibiting thermal run-away in a multi-phase power converter at varying load transition rates. A single phase or multi-phase power converter having an on-time is provided and the frequency of the power converter is adjusted so that a load step period and the on time of the single phase power converter are in a temporal relationship. Alternatively, a load step rate is inhibited from locking onto a phase current of the single phase power converter by suspending an oscillator signal. In accordance with another alternative, a load step rate is inhibited from locking onto a phase current of the single phase power converter by suspending an oscillator signal and dithering an input signal to the oscillator.

Abstract: A method for method for inhibiting thermal run-away in a multi-phase power converter at varying load transition rates. A multi-phase power converter having an on-time is provided and the frequency of the multi-phase power converter is adjusted so that a load step period and the on time of the multi-phase power converter are in a temporal relationship. Alternatively, a load step rate is inhibited from locking onto a phase current of the multi-phase power converter by suspending an oscillator signal. In accordance with another alternative, a load step rate is inhibited from locking onto a phase current of the multi-phase power converter by suspending an oscillator signal and dithering an input signal to the oscillator.

Abstract: A voltage sequencer includes an input terminal and an output terminal and a control element connected between the input an output terminals. A capacitive element is connected between the output terminal and a first voltage and a resistive element is connected between the output terminal and a second voltage. The control element selectively controls charging and discharging of the capacitive element such that, upon the voltage at the input terminal increasing from the first voltage to a nominal value, the output terminal voltage increases to a nominal value in a first predetermined period of time and upon the voltage at the input terminal decreasing from the nominal value to the first voltage, the output terminal voltage decreases to the first voltage value in a second predetermined period of time, the first predetermined period of time being different from, for example, substantially greater than, the second predetermined period of time.

Abstract: A system includes a processor, a voltage regulator and a circuit. The processor uses a first supply voltage to furnish a first indication of a second supply voltage to be received by the processor. The voltage regulator furnishes the second supply voltage in response to both the first indication and a second indication that the first supply voltage is valid. The circuit provides the second indication and regulates a timing of the second indication to prevent the voltage regulator from furnishing the second supply voltage until a predefined interval of time has elapsed after the first supply voltage becomes valid.

Abstract: A radial base heatsink is provided to dissipate heat from a heat source. Such a heatsink comprises a cylindrical core; and a plurality of cooling fins projecting outwardly from the cylindrical core and defining a series of channels in a substantially radial pattern with a fin orientation relative to a center line of the cylindrical core, for dissipating heat generated from a heat source, via the cylindrical core.

Abstract: A radial base heatsink is provided to dissipate heat from a heat source. Such a heatsink comprises a cylindrical core; and a plurality of cooling fins projecting outwardly from the cylindrical core and defining a series of channels in a substantially radial pattern with a fin orientation relative to a center line of the cylindrical core, for dissipating heat generated from a heat source, via the cylindrical core.

Abstract: The present invention provides a method or process for determining a load line based variable voltage input for an Integrated Circuit (IC) product. More particularly, the present invention provides a method/process for determining a variable load line that defines voltage input (Vcc) as a function of current draw (Icc) for an IC product. In one embodiment, the method includes defining a minimum voltage relative to a reference voltage level for an IC product at a maximum current draw Icc of the IC product. A maximum voltage relative to the reference voltage level for the IC product, at a minimum current draw Icc of the IC product, is also defined. Next, a load line based upon the maximum and minimum voltages and current draws, respectively, is calculated. The load line defines the voltage requirements for the IC product as a function of current draw Icc.

Abstract: A method includes converting a first voltage into a second voltage. The second voltage is routed to a power supply line when the second voltage exceeds a first predefined threshold, and the second voltage is isolated from the power supply line when the first voltage decreases below a second predefined voltage.

Abstract: The present invention provides a method or process for determining a load line based variable voltage input for an Integrated Circuit (IC) product. More particularly, the present invention provides a method/process for determining a variable load line that defines voltage input (Vcc) as a function of current draw (Icc) for an IC product. In one embodiment, the method includes defining a minimum voltage relative to a reference voltage level for an IC product at a maximum current draw Icc of the IC product. A maximum voltage relative to the reference voltage level for the IC product, at a minimum current draw Icc of the IC product, is also defined. Next, a load line based upon the maximum and minimum voltages and current draws, respectively, is calculated. The load line defines the voltage requirements for the IC product as a function of current draw Icc.

Abstract: A voltage sequencer includes an input terminal and an output terminal and a control element connected between the input an output terminals. A capacitive element is connected between the output terminal and a first voltage and a resistive element is connected between the output terminal and a second voltage. The control element selectively controls charging and discharging of the capacitive element such that, upon the voltage at the input terminal increasing from the first voltage to a nominal value, the output terminal voltage increases to a nominal value in a first predetermined period of time and upon the voltage at the input terminal decreasing from the nominal value to the first voltage, the output terminal voltage decreases to the first voltage value in a second predetermined period of time, the first predetermined period of time being different from, for example, substantially greater than, the second predetermined period of time.