Patents by Inventor Michael A. Wright
Michael A. Wright has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8374638Abstract: According to a particular embodiment, a method for distributing messages is provided that includes receiving one or more short message service (SMS) messages. The method also includes distributing one or more of the messages to a selected one or a plurality of short message service center (SMSC) servers.Type: GrantFiled: March 14, 2011Date of Patent: February 12, 2013Assignee: Cisco Technology, Inc.Inventor: Michael A. Wright
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Publication number: 20110165899Abstract: According to a particular embodiment, a method for distributing messages is provided that includes receiving one or more short message service (SMS) messages. The method also includes distributing one or more of the messages to a selected one or a plurality of short message service center (SMSC) servers.Type: ApplicationFiled: March 14, 2011Publication date: July 7, 2011Applicant: Cisco Technology, Inc.Inventor: Michael A. Wright
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Patent number: 7940656Abstract: A method for authenticating an element in a network environment is provided that includes receiving a request for one or more triplets. One or more of the triplets may be associated with an authentication communications protocol that may be executed in order to facilitate a communication session. The method further includes returning one or more of the triplets in response to the request and initiating the communication session in response to the triplets after proper authentication of an entity associated with the request.Type: GrantFiled: December 3, 2007Date of Patent: May 10, 2011Assignee: Cisco Technology, Inc.Inventors: Amitava Das, Michael A. Wright, Joseph A. Salowey, William C. Gossman
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Patent number: 7941165Abstract: According to a particular embodiment, a method for distributing messages is provided that includes receiving one or more short message service (SMS) messages. The method also includes distributing one or more of the messages to a selected one or a plurality of short message service center (SMSC) servers.Type: GrantFiled: March 2, 2005Date of Patent: May 10, 2011Assignee: Cisco Technology, Inc.Inventor: Michael A. Wright
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Patent number: 7716723Abstract: A system for user authentication includes a gateway operable to receive a user authentication request in an Internet Protocol format from a server. The gateway communicates the user authentication request in a Signaling System 7 protocol to a user registry. The gateway is also operable to receive a user authentication response in the Signaling System 7 protocol from the user registry. The gateway communicates the user authentication response in the Internet Protocol format to the server.Type: GrantFiled: October 7, 2002Date of Patent: May 11, 2010Assignee: Cisco Technology, Inc.Inventors: Wayne N. Taylor, Joseph A. Salowey, Michael A. Wright, Amitava Das, William C. Gossman, Gopal K. Dommety
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Patent number: 7310307Abstract: A method for authenticating an element in a network environment is provided that includes receiving a request for one or more triplets. One or more of the triplets may be associated with an authentication communications protocol that may be executed in order to facilitate a communication session. The method further includes returning one or more of the triplets in response to the request and initiating the communication session in response to the triplets after proper authentication of an entity associated with the request.Type: GrantFiled: December 17, 2002Date of Patent: December 18, 2007Assignee: Cisco Technology, Inc.Inventors: Amitava Das, Michael A. Wright, Joseph A. Salowey, William C. Gossman
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Patent number: 7082121Abstract: A wireless communication system includes a radio node controller in an SS7 network that generates SS7 formatted information for transport in an Asynchronous Transfer Mode Permanent Virtual Circuit in response to communications with a mobile unit. A signaling gateway receives the SS7 formatted information on the Asynchronous Transfer Mode Permanent Virtual Circuit. The signaling gateway translates the SS7 formatted information into Internet Protocol information and maps the Asynchronous Transfer Mode Permanent Virtual Circuit to stream control transmission protocol endpoint and stream. A mobile switching center in an Internet Protocol network receives the Internet Protocol formatted information on the Stream Control Transmission Protocol stream and performs further processing thereof.Type: GrantFiled: December 13, 2001Date of Patent: July 25, 2006Assignee: Cisco Technology, Inc.Inventors: Timothy P. Stammers, Michael A. Wright
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Patent number: 6754747Abstract: A system and method are provided for configuring an I/O bus. The system and method includes a plurality of adapter cards. A plurality of adapter card slots associated with the I/O busses receive the adapter cards into the computer. A user initiates optimization to check for configuration optimization problems and more specifically to check the placement of the adapter cards within the adapter card slots of the I/O busses. The user initiates optimization and in turn activates the improvement engine within the computer. The improvement engine analyzes the data transfer rates of the I/O busses and adapter cards and the placement of the adapter cards to determine an improved configuration of the adapter cards within the I/O busses. Indicators located proximate to the I/O busses display visual indication regarding the adapter card placement within the I/O busses allowing the user to determine if the configuration can be improved.Type: GrantFiled: January 25, 2001Date of Patent: June 22, 2004Assignee: Dell Products L.P.Inventors: David A. Locklear, Michael A. Wright
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Publication number: 20020099875Abstract: A system and method are provided for configuring an I/O bus. The system and method includes a plurality of adapter cards. A plurality of adapter card slots associated with the I/O busses receive the adapter cards into the computer. A user initiates optimization to check for configuration optimization problems and more specifically to check the placement of the adapter cards within the adapter card slots of the I/O busses. The user initiates optimization and in turn activates the improvement engine within the computer. The improvement engine analyzes the data transfer rates of the I/O busses and adapter cards and the placement of the adapter cards to determine an improved configuration of the adapter cards within the I/O busses. Indicators located proximate to the I/O busses display visual indication regarding the adapter card placement within the I/O busses allowing the user to determine if the configuration can be improved.Type: ApplicationFiled: January 25, 2001Publication date: July 25, 2002Applicant: DELL PRODUCTS L. P.Inventors: David A. Locklear, Michael A. Wright
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Patent number: 6253319Abstract: A computer system is provided with a multifunction power switch. In addition to the normal function of turning the computer on and off, the power switch has the additional function of clearing CMOS memory. In one embodiment, pressing the power switch while the computer is connected to a power source turns the computer on and off, and when the computer is disconnected from the power source, the CMOS memory may be cleared by pressing and holding the power switch for a predetermined time delay, e.g. 10 seconds. As a precaution against malicious clearing of CMOS memory, activation of this feature may be disabled as long as the computer cover is closed. In this case, the computer cover would have to be at least partially removed before the power button is pressed and held to clear CMOS. An LED may be provided which illuminates to indicate the success of the CMOS clearing operation.Type: GrantFiled: October 22, 1998Date of Patent: June 26, 2001Assignee: Compaq Computer CorporationInventors: Robin T. Tran, Michael A. Wright, Michael R. Durham
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Patent number: 5903162Abstract: An adapter for a measurement test instrument electrical probe has a flexible dielectric substrate with electrically conductive runs thereon. One end of the conductive runs has first electrical contacts with a pitch geometry corresponding to the pitch geormetry of electrical contacts of an electronic device that is electically connected to a substrate via the electrical contacts of the device. The other end of the conductive runs has second electrical contacts that have a pitch geometry compatible with the electrical probe of the measurement test instrument.Type: GrantFiled: October 14, 1997Date of Patent: May 11, 1999Assignee: Tektronix, Inc.Inventors: Paul A. Cole, Emory J. Harry, Michael A. Wright
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Patent number: 5757806Abstract: A data multiplexing system which includes a plurality of data multiplexing buses through which a plurality of low-speed digital signals are collected into, and distributed from, a multiplexer/demultiplxer. In a data multiplexing mode, the low-speed digital signals entered from a plurality of low-speed transmission lines have their signal format converted by respectively corresponding low-speed interface circuits, and the resulting signals are multiplexed in time slots designated within a multiplexed signal of primary level on the up bus line of the corresponding data multiplexing bus. The high-speed multiplexer multiplexes the collected signals up to a predetermined signal level and sends the resulting secondary multiplexed signal to a high-speed interface module having a high-speed transmission line interface. The high-speed interface module converts the received secondary multiplexed signal and sends the resulting signal to the high-speed transmission line.Type: GrantFiled: April 28, 1997Date of Patent: May 26, 1998Assignee: Hitachi, Ltd.Inventors: Hiroki Koyama, Yoshihiro Ashi, Hiroyuki Fujita, Michael A. Wright
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Patent number: 5548223Abstract: An adapter for a measurement test instrument electrical probe has a flexible dielectric substrate with electrically conductive runs thereon. One end of the conductive runs has first electrical contacts with a pitch geometry corresponding to the pitch geometry of electrical contacts of an electronic device that is electrically connected to a substrate via the electrical contacts of the device. The other end of the conductive runs has second electrical contacts that have a pitch geometry compatible with the electrical probe of the measurement test instrument.Type: GrantFiled: February 16, 1995Date of Patent: August 20, 1996Assignee: Tektronix, Inc.Inventors: Paul A. Cole, Emory J. Harry, Michael A. Wright
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Patent number: 5490662Abstract: The invention is a kit of parts to be retrofitted to a type of garage-door spring that functions in extension and may break near its retention hook, which may be an integral hook formed by bending of the spring material itself. The kit of this invention improves safety by reducing the chance of the spring-retention hooks' breaking. The kit has two major parts which are easily assembled together and attached to an existing spring without the use of tools. A disk-shaped centering clement contacts the spring coils at least at three positions on its rim, thereby distributing stress over a significantly larger area than the conventional integral retention hooks. The disk has an aperture, a notch, and a flat. A hook element fits through the notch and aperture, and a dogleg portion of the hook element extends beyond the disk's rim contacting the spring's end to help prevent the spring from turning.Type: GrantFiled: March 29, 1995Date of Patent: February 13, 1996Inventor: Michael A. Wright
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Patent number: 5452307Abstract: A data multiplexing system comprising a plurality of data multiplexing buses through which a plurality of low-speed digital signals are collected into, and distributed from, a multiplexer/demultiplexer. In a data multiplexing mode, the low-speed digital signals entered from a plurality of low-speed transmission lines have their signal format converted by respectively corresponding low-speed interface circuits, and the resulting signals are multiplexed in time slots designated within a multiplexed signal of primary level on the up bus line of the corresponding data multiplexing bus, under the controls of respectively corresponding bus control circuits. The high-speed multiplexer collects the primary multiplexed signals on the up bus lines of the plurality of data multiplexing buses, and further multiplexes the collected signals up to a predetermined signal level. Thereafter, it sends the resulting secondary multiplexed signal to a high-speed interface module having a high-speed transmission line interface.Type: GrantFiled: October 20, 1994Date of Patent: September 19, 1995Assignee: Hitachi, Ltd.Inventors: Hiroki Koyama, Yoshihiro Ashi, Hiroyuki Fujita, Michael A. Wright