Abstract: Vehicle platforms, and systems, subsystems, and components thereof are described. A self-contained vehicle platform or chassis incorporating substantially all of the functional systems, subsystems and components (e.g., mechanical, electrical, structural, etc.) necessary for an operative vehicle. Functional components may include at least energy storage/conversion, propulsion, suspension and wheels, steering, crash protection, and braking systems. Functional components are standardized such that vehicle platforms may be interconnected with a variety of vehicle body designs (also referred to in the art as “top hats”) with minimal or no modification to the functional linkages (e.g., mechanical, structural, electrical, etc.) therebetween. Configurations of functional components are incorporated within the vehicle platform such that there is minimal or no physical overlap between the functional components and the area defined by the vehicle body.

Abstract: A suspension system configured to sit substantially within the profile of a vehicle platform such that none of the elements extend substantially above the plane of the vehicle platform. The suspension system may utilize an adaptable transverse leaf spring in combination with other suspension elements, to allow the vehicle platform to maintain a generally flat profile and accommodate a variety of different body like structures while maintaining the desired roll and ride stability stiffness.

Abstract: Vehicle platforms, and systems, subsystems, and components thereof are described. A self-contained vehicle platform or chassis incorporating substantially all of the functional systems, subsystems and components (e.g., mechanical, electrical, structural, etc.) necessary for an operative vehicle. Functional components may include at least energy storage/conversion, propulsion, suspension and wheels, steering, crash protection, and braking systems. Functional components are standardized such that vehicle platforms may be interconnected with a variety of vehicle body designs (also referred to in the art as “top hats”) with minimal or no modification to the functional linkages (e.g., mechanical, structural, electrical, etc.) therebetween. Configurations of functional components are incorporated within the vehicle platform such that there is minimal or no physical overlap between the functional components and the area defined by the vehicle body.

Abstract: A compressed instruction format for a VLIW processor allows greater efficiency in use of cache and memory. Instructions are byte aligned and variable length. Branch targets are uncompressed. Format bits specify how many issue slots are used in a following instruction. NOPS are not stored in memory. Individual operations are compressed according to features such as whether they are resultless, guarded, short, zeroary, unary, or binary. Instructions are stored in compressed form in memory and in cache. Instructions are decompressed on the fly after being read out from cache.

Abstract: A compressed instruction format for a VLIW processor allows greater efficiency in use of cache and memory. Instructions are byte aligned and variable length. Branch targets are uncompressed. Format bits specify how many issue slots are used in a following instruction. NOPS are not stored in memory. Individual operations are compressed according to features such as whether they are resultless, guarded, short, zeroary, unary, or binary. Instructions are stored in compressed form in memory and in cache. Instructions are decompressed on the fly after being read out from cache.

Abstract: A compressed instruction format for a VLIW processor allows greater efficiency in use of cache and memory. Instructions are byte aligned and variable length. Branch targets are uncompressed. Format bits specify how many issue slots are used in a following instruction. NOPS are not stored in memory. Individual operations are compressed according to features such as whether they are resultless, guarded, short, zeroary, unary, or binary. Instructions are stored in compressed form in memory and in cache. Instructions are decompressed on the fly after being read out from cache.

Abstract: Cache layout is simplified by swizzling the bits of instruction words. Then the words are read out of cache by using a shuffled bit stream which simplifies cache layout. The object is further met using a cache structure which includes a device for storing a shuffled instruction stream; and a device for multiplexing bits from the storage means onto the bus so that the bits are deshuffled. The multiplexing means includes a multiplicity of lines leading from the storage device to the bus. The read lines do not cross each other.

Abstract: Software creates a compressed instruction format for a VLIW processor which allows greater efficiency in use of cache and memory. Instructions are byte aligned and variable length. Branch targets are uncompressed. Format bits specify how many issue slots are used in a following instruction. NOPS are not stored in memory. Individual operations are compressed according to features such as whether they are resultless, guarded, short, zeroary, unary, or binary. Instructions are stored in compressed form in memory and in cache. Instructions are decompressed on the fly after being read out from cache.

Abstract: The software which produces a shuffled bit stream which bit stream allows for a simplified cache layout. This object is met using computer software which includes code for receiving a compiled and linked object module produced by a compiler and/or linker and code for swizzling the compiled and linked software to produce a second object module. The second object module is suitable for being deswizzled upon reading from a cache memory using a cache structure whose output bus wires are not crossed.

Abstract: A VLIW processor uses a compressed instruction format that allows greater efficiency in use of cache and memory. Instructions are byte aligned and variable length. Branch targets are uncompressed. Format bits specify how many issue slots are used in a following instruction. NOPS are not stored in memory. Individual operations are compressed according to features such as whether they are resultless, guarded, short, zeroary, unary, or binary. Instructions are stored in compressed form in memory and in cache. Instructions are decompressed on the fly after being read out from cache.

Abstract: A compressed instruction format for a VLIW processor allows greater efficiency in use of cache and memory. Instructions are byte aligned and variable length. Branch targets are uncompressed. Format bits specify how many issue slots are used in a following instruction. NOPS are not stored in memory. Individual operations are compressed according to features such as whether they are resultless, guarded, short, zeroary, unary, or binary. Instructions are stored in compressed form in memory and in cache. Instructions are decompressed on the fly after being read out from cache.

Abstract: Software creates a compressed instruction format for a VLIW processor which allows greater efficiency in use of cache and memory. Instructions are byte aligned and variable length. Branch targets are uncompressed. Format bits specify how many issue slots are used in a following instruction. NOPS are not stored in memory. Individual operations are compressed according to features such as whether they are resultless, guarded, short, zeroary, unary, or binary. Instructions are stored in compressed form in memory and in cache. Instructions are decompressed on the fly after being read out from cache.

Abstract: A disposable container for forming the end wall of the open end of a barrel of a syringe and for being retained thereon by the resilient interaction of a surface of the barrel and the resilient periphery of a circumferential flange at the intersection of a substantially rigid first wall portion and a flexible second wall portion of the container. Preferably the resilient periphery flexes when pressed into the barrel and then springs out to engage an annular channel-like area in the barrel.