Patents by Inventor Michael Antcliffe

Michael Antcliffe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8039903
    Abstract: In various embodiments, a tiered gate structure transistor is provided including a source, a drain, and a gate between the source and the drain. The tiered gate structure transistor including a gate foot having a top portion and sidewalls. A gate head is attached to the top portion of the gate foot. A passivation layer extends along and directly contacts an uppermost surface of the source, and extends along and directly contacts an uppermost surface of the drain, the passivation layer surrounds the sidewalls of the gate foot such that the top portion is not covered by the passivation layer and such that the passivation layer surrounding the sidewalls supports the gate head.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: October 18, 2011
    Assignee: HRL Laboratories, LLC
    Inventors: Ivan Milosavljevic, Adele Schmitz, Michael Antcliffe, Ming Hu, Lorna Hodgson
  • Patent number: 7804114
    Abstract: In one embodiment, a tiered gate device is provided including a source, a drain, and a gate foot therebetween. A gate head is attached to the gate foot. A source extension extends from on an uppermost surface of the source toward the gate foot along the substrate. In some embodiments a drain extension extends from on and uppermost surface of the drain toward the gate foot along the substrate.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: September 28, 2010
    Assignee: HRL Laboratories, LLC
    Inventors: Ivan Milosavljevic, Adele Schmitz, Michael Antcliffe, Ming Hu
  • Patent number: 7723761
    Abstract: In one embodiment, a tiered gate structure is provided having a substrate including a source, a drain and a gate thereon. The gate includes an elongated gate foot having a first deposition gate material extending from the substrate, the elongated gate foot having a top portion distal from the substrate. The gate head has a second deposition gate material and includes an elongated portion extending downward from the gate head to connect to the top portion of the elongated gate foot.
    Type: Grant
    Filed: September 17, 2008
    Date of Patent: May 25, 2010
    Assignee: HRL Laboratories, LLC
    Inventors: Ivan Milosavljevic, Adele Schmitz, Michael Delaney, Michael Antcliffe
  • Patent number: 7608497
    Abstract: A method for fabricating a tiered structure includes forming a gate on a semiconductor substrate. Formation of the gate includes depositing a gate foot using a gate foot mask having an opening through it to define the gate foot over the substrate. After forming the gate foot, the gate foot mask is stripped and a passivation layer is formed over the gate foot and the substrate. A gate head mask is formed over the gate foot with the gate head mask exposing a portion of the passivation layer on a top portion of the gate foot. The portion of the passivation layer on the top portion of the gate foot is removed to expose the top portion of the gate foot. A gate head is formed on the top portion of the gate foot using the gate head mask. A lift-off process is performed, removing the gate head mask.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: October 27, 2009
    Inventors: Ivan Milosavljevic, Adele Schmitz, Michael Antcliffe, Ming Hu, Lorna Hodgson
  • Patent number: 7534672
    Abstract: In one embodiment, a tiered gate device is provided including a source, a drain, and a gate foot therebetween. A gate head is attached to the gate foot. A source extension extends from on the source toward the gate foot along the substrate. In some embodiments a drain extension extends from on the drain toward the gate foot along the substrate.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: May 19, 2009
    Assignee: HRL Laboratories, LLC
    Inventors: Ivan Milosavljevic, Adele Schmitz, Michael Antcliffe, Ming Hu
  • Patent number: 7439166
    Abstract: In one implementation, a method for fabricating a tiered structure is provided, which includes forming a source and a drain on a substrate with a gate formed therebetween. Formation of the gate includes depositing a gate foot using a gate foot mask having an opening through it to define the gate foot over the substrate. After forming the gate foot, the gate foot mask is stripped. A gate head mask is formed over the gate foot with the gate head mask exposing a top portion of the gate foot. A gate head is formed on the top portion of the gate foot using the gate head mask. A lift-off process is performed, removing the gate head mask.
    Type: Grant
    Filed: June 11, 2005
    Date of Patent: October 21, 2008
    Assignee: HRL Laboratories, LLC
    Inventors: Ivan Milosavljevic, Adele Schmitz, Michael Delaney, Michael Antcliffe