Patents by Inventor Michael Anthony Ang
Michael Anthony Ang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6509785Abstract: An active digital voltage regulator circuit is a two terminal device that is connected in shunt to first and second power supply input lines. The active digital voltage regulator circuit stores energy during times when the local power supply voltage is greater than a predefined voltage, e.g., during times when the parasitic inductances supplement the local power supply voltage. The active digital voltage regulator circuit uses the stored energy to supplement the local power supply voltage during times when the local power supply voltage starts to collapse, e.g., during periods when inductive losses are preventing the power supply from maintaining the local power supply voltage. Consequently, digital active voltage regulator circuit smooths the local power supply voltage by greatly ameliorating the ripple voltages associated with parasitic inductances and resistances. A control circuit within the regulator circuit is a combination of two self-biasing and off-set nulling power supply monitor circuits.Type: GrantFiled: March 22, 2000Date of Patent: January 21, 2003Assignee: Sun Microsystems, Inc.Inventors: Michael Anthony Ang, Alexander Dougald Taylor
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Patent number: 6384675Abstract: An active digital voltage regulator circuit is a two terminal device that is connected in shunt to first and second power supply input lines. The active digital voltage regulator circuit stores energy during times when the local power supply voltage is greater than a predefined voltage, e.g., during times when the parasitic inductances supplement the local power supply voltage. The active digital voltage regulator circuit uses the stored energy to supplement the local power supply voltage during times when the local power supply voltage starts to collapse, e.g., during periods when inductive losses are preventing the power supply from maintaining the local power supply voltage. Consequently, digital active voltage regulator circuit smooths the local power supply voltage by greatly ameliorating the ripple voltages associated with parasitic inductances and resistances. A control circuit within the regulator circuit is a combination of two self-biasing and off-set nulling power supply monitor circuits.Type: GrantFiled: March 22, 2000Date of Patent: May 7, 2002Assignee: Sun Microsystems, Inc.Inventors: Michael Anthony Ang, Alexander Dougald Taylor
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Publication number: 20020008565Abstract: An active digital voltage regulator circuit is a two terminal device that is connected in shunt to first and second power supply input lines. The active digital voltage regulator circuit stores energy during times when the local power supply voltage is greater than a predefined voltage, e.g., during times when the parasitic inductances supplement the local power supply voltage. The active digital voltage regulator circuit uses the stored energy to supplement the local power supply voltage during times when the local power supply voltage starts to collapse, e.g., during periods when inductive losses are preventing the power supply from maintaining the local power supply voltage. Consequently, digital active voltage regulator circuit smooths the local power supply voltage by greatly ameliorating the ripple voltages associated with parasitic inductances and resistances. A control circuit within the regulator circuit is a combination of two self-biasing and off-set nulling power supply monitor circuits.Type: ApplicationFiled: March 22, 2000Publication date: January 24, 2002Inventors: Michael Anthony Ang, Alexander Dougald Taylor
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Patent number: 6339542Abstract: A method of continuously replenishing a four-transistor static RAM storage cell is described. Such method comprises biasing both the back gate terminals and the normal gate terminals of the two bit line coupling transistors in the static RAM storage cell to voltage levels for causing a flow of small compensating currents through such coupling transistors when they are in a standby or non-access condition. Such small compensating currents are supplied to the two storage transistors in the storage cell for replenishing leakage of charge from the parasitic capacitance in the storage cell. The bias voltages are supplied by adaptive bias circuits which adjust the bias voltages to track changes in the leakage of charge from the parasitic cell capacitance.Type: GrantFiled: June 6, 2001Date of Patent: January 15, 2002Assignee: Sun Microsystems, Inc.Inventors: Michael Anthony Ang, Raymond A. Heald, Roger Y. Lo
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Publication number: 20010028575Abstract: A method of continuously replenishing a four-transistor static RAM storage cell is described. Such method comprises biasing both the back gate terminals and the normal gate terminals of the two bit line coupling transistors in the static RAM storage cell to voltage levels for causing a flow of small compensating currents through such coupling transistors when they are in a standby or non-access condition. Such small compensating currents are supplied to the two storage transistors in the storage cell for replenishing leakage of charge from the parasitic capacitance in the storage cell. The bias voltages are supplied by adaptive bias circuits which adjust the bias voltages to track changes in the leakage of charge from the parasitic cell capacitance.Type: ApplicationFiled: June 6, 2001Publication date: October 11, 2001Inventors: Michael Anthony Ang, Raymond A. Heald, Roger Y. Lo
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Patent number: 6301146Abstract: A method of continuously replenishing a four-transistor static RAM storage cell is described. Such method comprises biasing both the back gate terminals and the normal gate terminals of the two bit line coupling transistors in the static RAM storage cell to voltage levels for causing a flow of small compensating currents through such coupling transistors when they are in a standby or non-access condition. Such small compensating currents are supplied to the two storage transistors in the storage cell for replenishing leakage of charge from the parasitic capacitance in the storage cell. The bias voltages arc supplied by adaptive bias circuits which adjust the bias voltages to track changes in the leakage of charge from the parasitic cell capacitance.Type: GrantFiled: December 23, 1999Date of Patent: October 9, 2001Inventors: Michael Anthony Ang, Raymond A. Heald, Roger Y. Lo
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Patent number: 6198325Abstract: An active digital voltage regulator circuit is a two terminal device that is connected in shunt to first and second power supply input lines. The active digital voltage regulator circuit stores energy during times when the local power supply voltage is greater than a predefined voltage, e.g., during times when the parasitic inductances supplement the local power supply voltage. A control circuit within the regulator circuit is a combination of two self-biasing and off-set nulling power supply monitor circuits. Each power supply monitor circuit further includes a differencing, non-overlapped, dual-output amplifier connected to the first and second power supply input lines. The differencing, non-overlapped, dual-output amplifier includes a predriver stage and an output stage, both of which are connected to the first and second power supply input lines.Type: GrantFiled: June 27, 1997Date of Patent: March 6, 2001Assignee: Sun Microsystems, Inc.Inventors: Michael Anthony Ang, Alexander Dougald Taylor
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Patent number: 6069521Abstract: An active digital voltage regulator circuit stores energy during times when the local power supply voltage is greater than a predefined voltage, e.g., during times when the parasitic inductances supplement the local power supply voltage. The active digital voltage regulator circuit uses the stored energy to supplement the local power supply voltage during times when the local power supply voltage starts to collapse, e.g., during periods when inductive losses are preventing the power supply from maintaining the local power supply voltage. A control circuit within the regulator circuit is a combination of two self-biasing and off-set nulling power supply monitor circuits. Each power supply monitor circuit further includes a differencing, non-overlapped, dual-output amplifier connected to the first and second power supply input lines.Type: GrantFiled: June 27, 1997Date of Patent: May 30, 2000Assignee: Sun MicrosystemsInventors: Alexander Dougald Taylor, Michael Anthony Ang
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Patent number: 6028417Abstract: An active digital voltage regulator circuit is a two terminal device that is connected in shunt to first and second power supply input lines. The active digital voltage regulator circuit stores energy during times when the local power supply voltage is greater than a predefined voltage, e.g., during times when the parasitic inductances supplement the local power supply voltage. The active digital voltage regulator circuit uses the stored energy to supplement the local power supply voltage during times when the local power supply voltage starts to collapse, e.g., during periods when inductive losses are preventing the power supply from maintaining the local power supply voltage. Consequently, digital active voltage regulator circuit smooths the local power supply voltage by greatly ameliorating the ripple voltages associated with parasitic inductances and resistances. A control circuit within the regulator circuit is a combination of two self-biasing and off-set nulling power supply monitor circuits.Type: GrantFiled: June 27, 1997Date of Patent: February 22, 2000Assignee: Sun Microsystems, Inc.Inventors: Michael Anthony Ang, Alexander Dougald Taylor
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Patent number: 5973547Abstract: An active digital voltage regulator circuit is a two terminal device that is connected in shunt to first and second power supply input lines. The active digital voltage regulator circuit stores energy during times when the local power supply voltage is greater than a predefined voltage, e.g., during times when the parasitic inductances supplement the local power supply voltage. The active digital voltage regulator circuit uses the stored energy to supplement the local power supply voltage during times when the local power supply voltage starts to collapse, e.g., during periods when inductive losses are preventing the power supply from maintaining the local power supply voltage. Consequently, digital active voltage regulator circuit smooths the local power supply voltage by greatly ameliorating the ripple voltages associated with parasitic inductances and resistances. A control circuit within the regulator circuit is a combination of two self-biasing and off-set nulling power supply monitor circuits.Type: GrantFiled: June 27, 1997Date of Patent: October 26, 1999Assignee: Sun Microsystems, IncInventors: Michael Anthony Ang, Alexander Dougald Taylor
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Patent number: 5870614Abstract: A data processor chip has a sensor that senses the temperature of the substrate. When the sensor senses that the temperature has increased beyond a predetermined level, the sensor supplies a signal to the processor. Upon receipt of the signal, the processor's execution switches from the current task to a task that is less compute intensive than the current one.Type: GrantFiled: January 21, 1997Date of Patent: February 9, 1999Assignee: Philips Electronics North America CorporationInventor: Michael Anthony Ang
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Patent number: 5668765Abstract: An electronic memory has a voltage sense amplifier coupled to a memory cell via a bit line for supply of an output signal under control of data stored in the cell. The sense amplifier is both powered and controlled by redistribution of electric charge, representative of the data and initially accumulated at the bit line, between the bit line and the output of the sense amplifier.Type: GrantFiled: June 6, 1996Date of Patent: September 16, 1997Assignee: Philips Electronics North America CorporationInventor: Michael Anthony Ang
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Patent number: 5642325Abstract: A cell in a multiport memory is connected to a respective bit line via respective switches. A write enable element is located between the switches and an input of the cell's storage device. A read enable element is located between an output of the storage device and the same switches. Thus, read bit lines and write bit lines are merged and the number of switches per cell is drastically reduced with respect to prior art multiport memories.Type: GrantFiled: September 27, 1995Date of Patent: June 24, 1997Assignee: Philips Electronics North America CorporationInventor: Michael Anthony Ang