Patents by Inventor Michael Anthony Perez
Michael Anthony Perez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 7146515Abstract: A system, method, and computer program product are disclosed for executing a reliable warm reboot of one of multiple partitions included in a logically partitioned data processing system. The data processing system includes partition hardware. A request to reboot a particular partition is received within the partition where the particular partition includes multiple processors. Prior to executing the reboot request, the partition hardware is set to a predetermined state. The reboot request is then executed within the particular partition. The predetermined state is preferably achieved by resetting the partition hardware to a predetermined state.Type: GrantFiled: June 20, 2002Date of Patent: December 5, 2006Assignee: International Business Machines CorporationInventors: Bradley Ryan Harrington, Chetan Mehta, Milton Devon Miller, II, Michael Anthony Perez, David Lee Randall, David R. Willoughby
-
Patent number: 7107495Abstract: A method, system, and computer program product are disclosed for improving isolation of I/O errors in logical partitioned data processing systems. A machine check is generated that indicates that an I/O error has occurred in the system. The PCI host bridge (PHB) that generated the machine check is identified. The system includes multiple PHBs, each with its own set of slots. Some of these slots may be enabled for enhanced error handling while others of them are not. The adapters that are not enabled for enhanced error handling and that are coupled to the PHB that generated the machine check are identified. It is then determined that the I/O error occurred in at least one of these slots that are not enabled for enhanced error handling.Type: GrantFiled: June 19, 2003Date of Patent: September 12, 2006Assignee: International Business Machines CorporationInventors: Alongkorn Kitamorn, Ashwini Kulkarni, Michael Anthony Perez, David R. Willoughby
-
Patent number: 7103808Abstract: A method, apparatus, and computer instructions for reporting errors occurring in a data processing system. Responsive to an error occurring in a host bridge in the data processing system, a determination is made as to whether a device required for generating an error report is located below the host bridge. Responsive to the device required for generating an error report being located below a host bridge, the host bridge is isolated from other portions of the data processing system, wherein only a processor analyzing the error is able to access the host bridge. An error reporting process is performed. The error reporting process is able to access the host bridge and the device.Type: GrantFiled: April 10, 2003Date of Patent: September 5, 2006Assignee: International Business Machines CorporationInventors: Alongkorn Kitamorn, Ashwini Kulkarni, Gordon D. McIntosh, Michael Anthony Perez
-
Patent number: 6976191Abstract: A method, apparatus, and computer instructions for processing errors in a hierarchical input/output sub-system having an input/output bridge with a plurality of hardware devices in a level below the bridge. A value is read from a selected register to form a read value in response to detecting an error. The selected register is reset. Each bit in the read value associated with the error is cleared to form a cleared value. The cleared value is written into the selected register such that errors occurring since the register was cleared are preserved. The error registers below the bridge are scanned in response to an absence of an error being detected in a bridge within the input/output sub-system. A determination is made as to whether the error has previously occurred in response to a presence of an error being found by scanning the registers below the bridge. The error is reported in response to an absence of a determination that the error has previously occurred.Type: GrantFiled: March 7, 2002Date of Patent: December 13, 2005Assignee: International Business Machines CorporationInventors: Alongkorn Kitamorn, Ashwini Kulkarni, Gordon D. McIntosh, Kanisha Patel, Michael Anthony Perez
-
Patent number: 6898686Abstract: Method, system, and apparatus for allocating memory to a plurality of expansion slots in a data processing system. During initialization, firmware allocates memory among a plurality of expansion slots on a rigid basis. If an input/output adapter functionally connected to one of the plurality of expansion slots requires more memory, the firmware reallocates the memory among the plurality of expansion slots such that the expansion slot occupied by the input/output adapter is allocated sufficient memory. If during runtime, an input/output adapter is hotplugged into the system and requires more memory than allocated to the slot in which the input/output adapter has been inserted, the firmware reallocates memory, first from unoccupied expansion slots and then, if necessary, from selected ones of occupied expansion slots.Type: GrantFiled: August 24, 2000Date of Patent: May 24, 2005Assignee: International Business Machines CorporationInventor: Michael Anthony Perez
-
Patent number: 6898644Abstract: A method, system, and apparatus for programming adapter settings in a data processing system is provided. In one embodiment, the data processing system programs a plurality of settings for each of a plurality of adapters using system based parameters. The data processing system then determines whether any of the adapters settings as programmed based on system based parameters are inconsistent with the specific requirements of the specific adapter. If one or more of the settings in any adapter are inconsistent with the adapter's requirements, those settings are reprogrammed using adapter specific parameters to ensure optimal performance of the data processing system with the adapter.Type: GrantFiled: August 24, 2000Date of Patent: May 24, 2005Assignee: International Business Machines CorporationInventor: Michael Anthony Perez
-
Publication number: 20040260981Abstract: A method, system, and computer program product are disclosed for improving isolation of I/O errors in logical partitioned data processing systems. A machine check is generated that indicates that an I/O error has occurred in the system. The PCI host bridge (PHB) that generated the machine check is identified. The system includes multiple PHBs, each with its own set of slots. Some of these slots may be enabled for enhanced error handling while others of them are not. The adapters that are not enabled for enhanced error handling and that are coupled to the PHB that generated the machine check are identified. It is then determined that the I/O error occurred in at least one of these slots that are not enabled for enhanced error handling.Type: ApplicationFiled: June 19, 2003Publication date: December 23, 2004Applicant: International Business Machines CorporationInventors: Alongkorn Kitamorn, Ashwini Kulkarni, Michael Anthony Perez, David R. Willoughby
-
Patent number: 6834363Abstract: A method for prioritizing bus errors for a computing system is provided. A subsystem test is executed on a first subsystem from a plurality of subsystems on a bus system, wherein the subsystem test on the bus system is specific to the first bus subsystem. An output is received in response to executing the subsystem test. In response to the output indicating an error on the first subsystem, a severity level is assessed based on the error. For all subsystems from the plurality of subsystems on the bus system, a subsystem test is executed on each remaining subsystem, wherein each subsystem test on the bus system is specific to each remaining subsystem. An output is received in response to executing each subsystem test. In response to the output indicating an error on any of the remaining subsystems, a severity level is assessed based on the error.Type: GrantFiled: March 22, 2001Date of Patent: December 21, 2004Assignee: International Business Machines CorporationInventors: Christopher Harry Austen, Michael Anthony Perez, Mark Walz Wenning
-
Patent number: 6820161Abstract: A method, system, and apparatus for providing data to an I/O adapter from a PCI-to-PCI bus bridge is provided. In one embodiment, once the PCI-to-PCI bus bridge receives a request for data from the I/O adapter, the PCI-to-PCI bus bridge determines whether the requested data is contained within a cached memory within the PCI-to-PCI bus bridge. If the data is contained within the cached memory, then the requested data is provided to the I/O adapter from the cached memory. If the requested data is not within the cached memory, the data is fetched from system memory, then cached in the PCI-to-PCI bus bridge, and sent to the requesting I/O adapter. To ensure that the data in the cached memory within the PCI-to-PCI bridge is not stale, signals are received, periodically or aperiodically, by the PCI-to-PCI bridge from a PCI host bridge indicating whether the data contained within the buffers is stale.Type: GrantFiled: September 28, 2000Date of Patent: November 16, 2004Assignee: International Business Machines CorporationInventor: Michael Anthony Perez
-
Publication number: 20040205393Abstract: A method, apparatus, and computer instructions for reporting errors occurring in a data processing system. Responsive to an error occurring in a host bridge in the data processing system, a determination is made as to whether a device required for generating an error report is located below the host bridge. Responsive to the device required for generating an error report being located below a host bridge, the host bridge is isolated from other portions of the data processing system, wherein only a processor analyzing the error is able to access the host bridge. An error reporting process is performed. The error reporting process is able to access the host bridge and the device.Type: ApplicationFiled: April 10, 2003Publication date: October 14, 2004Applicant: International Business Machines CorporationInventors: Alongkorn Kitamorn, Ashwini Kulkarni, Gordon D. McIntosh, Michael Anthony Perez
-
Patent number: 6704823Abstract: A method and an apparatus is present for dynamically allocating a set of output interrupt lines at a host adapter to a set of input interrupt lines for card slots controlled by the host adapter. If the number of input interrupt lines is greater than the number of output lines, then interrupt sharing is necessary. The number of input interrupt lines can be determined automatically by scanning all the card slots or can be determined by values stored in lookup tables. The algorithm to determine a logical mapping of the input interrupt lines to the output lines, in cases where interrupt sharing is required, can be based on a number of factors. A simple approach is to distribute the interrupts as equally as possible. Another algorithm may take into account the expected frequency of interrupts based on the device involved. Yet another approach may use a set of predetermined priorities. Since these algorithms are implemented in firmware or software, they can be changed to meet a particular set of needs.Type: GrantFiled: July 20, 2000Date of Patent: March 9, 2004Assignee: International Business Machines CorporationInventors: Michael Anthony Perez, Louis Gabriel Rodriguez
-
Patent number: 6697940Abstract: A method, system, and apparatus for customizing procedures to be performed during an initialization process in a data processing system is provided. In one embodiment, a class of procedures to omit during the initialization process is determined. This class of procedures may be for example, the omission of identifying and creating nodes for a certain class of drives, such as, for example, all ssa drives. Once procedures to omit from the initialization process are determined, then all other initialization procedures are performed except, of course, for the procedures belonging to the class of procedures determined to be omitted.Type: GrantFiled: August 24, 2000Date of Patent: February 24, 2004Assignee: International Business Machines CorporationInventors: Michael Anthony Perez, Louis Gabriel Rodriguez
-
Publication number: 20040030881Abstract: In a computer system, upon the occurrence of a reboot command, RunTime Abstraction Services (RTAS) microcode is loaded onto a first host processor. The service processor, upon request from the RTAS microcode, then issues a command to reset all host processors other than the first host processor on which the RTAS microcode resides, and then the RTAS microcode issues a series of commands to reset all I/O adapters. Once the host processors and I/O adapters have been reset, they are initialized to a predetermined, known state. Only after the host processors and I/O adapters have been reset and initialized is the reboot request executed. By resetting all but the first host processor and the I/O adapters before executing the reboot request, all activity originating from the host processors and from the I/O drawers is terminated, so that when the reboot request is executed, the host processors and I/O drawers are ready for initialization.Type: ApplicationFiled: August 8, 2002Publication date: February 12, 2004Applicant: International Business Machines Corp.Inventors: Bradley Ryan Harrington, Ajay Kumar Mahajan, Chetan Mehta, Milton Devon Miller, Michael Anthony Perez, Peter Dinh Phan, David R. Willoughby
-
Publication number: 20030236972Abstract: A system, method, and computer program product are disclosed for executing a reliable warm reboot of one of multiple partitions included in a logically partitioned data processing system. The data processing system includes partition hardware. A request to reboot a particular partition is received within the partition where the particular partition includes multiple processors. Prior to executing the reboot request, the partition hardware is set to a predetermined state. The reboot request is then executed within the particular partition. The predetermined state is preferably achieved by resetting the partition hardware to a predetermined state.Type: ApplicationFiled: June 20, 2002Publication date: December 25, 2003Applicant: International Business Machines CorporationInventors: Bradley Ryan Harrington, Chetan Mehta, Milton Devon Miller, Michael Anthony Perez, David Lee Randall, David R. Willoughby
-
Patent number: 6665753Abstract: A method, system, and apparatus for modifying bridges within a data processing system to provide improved performance is provided. In one embodiment, the data processing system determines the number of input/output adapters connected underneath each PCI host bridge. The data processing system also determines the type of each input/output adapter. The size and number of buffers within the PCI host bridge is then modified based on the number of adapters beneath it as well as the type of adapters beneath it to improve data throughput performance as well as prevent thrashing of data. The PCI host bridge is also modified to give load and store operations priority over DMA operations. Each PCI-to-PCI bridge is modified based on the type of adapter connected to it such that the PCI-to-PCI bridge prefetches only an amount of data consistent with the type of adapter such that excess data is not thrashed, thus requiring extensive repetitive use of the system buses to retrieve the same data more than once.Type: GrantFiled: August 10, 2000Date of Patent: December 16, 2003Assignee: International Business Machines CorporationInventors: Pat Allen Buckland, Michael Anthony Perez, Kiet Anh Tran, Adalberto Guillermo Yanes
-
Patent number: 6662318Abstract: A method, system, and apparatus for monitoring errors within a data processing system is provided. In one embodiment an error notification system receives an indication of notification conditions and actions from a user. The system then searches for the specified conditions. Responsive to the occurrence of the specified condition, the system performs specified actions and sends a notification to a user. The specified actions may include, for example, rebooting the computer or generating a web page of information regarding the occurrence of the condition. The notification may be sent to a user via, for example, e-mail.Type: GrantFiled: August 10, 2000Date of Patent: December 9, 2003Assignee: International Business Machines CorporationInventors: Irving Guwor Baysah, Michael Anthony Perez
-
Patent number: 6662320Abstract: A method and an apparatus is presented for preventing an adapter card that has been reset from issuing spurious error signals due to the fact it is not synchronized with the system at the time it comes out of reset. To prevent spurious errors, the data processing issues a command to the adapter card that is to be reset that disables error checking before the reset command is sent. The reset command is sent next. After the adapter card completes the reset operation, it notifies the system that the reset is completed. The adapter card waits until it receives a command from the system to re-enable error checking before it turns back on error checking. In this manner, the system can insure that error checking is only turned back on synchronously with other system activities so that spurious error signals are not generated.Type: GrantFiled: July 20, 2000Date of Patent: December 9, 2003Assignee: International Business Machines CorporationInventors: Rafael Graniello Cabezas, Robert George Kovacs, Michael Anthony Perez
-
Patent number: 6658599Abstract: A method, system, and apparatus for managing a failed input/output adapter within a data processing system is provided. In one embodiment, an operating system handler receives an indication that one of a plurality of input/output adapters has failed. The operating system handler consults an error log to determine which input/output adapter has failed. Once the bad input/output adapter has been determined, the operating system handler disables the bad input/output adapter and deallocates any processes bound for the bad input/output adapter without powering down the data processing system. A user is then notified of the bad input/output adapter so that the bad input/output adapter can be replaced. The input/output adapter may be replaced without powering down the data processing system. Once the bad input/output adapter has been replace, the new input/output adapter is enabled.Type: GrantFiled: June 22, 2000Date of Patent: December 2, 2003Assignee: International Business Machines CorporationInventors: Stephen Dale Linam, Michael Anthony Perez, Louis Gabriel Rodriguez, Mark Walz Wenning
-
Publication number: 20030191978Abstract: A method, computer program product, and data processing system for locating hardware faults occurring in multiple devices in a data processing system is disclosed. The devices have a scanning order in which the devices (or at least information regarding the devices) are scanned to analyze any possible error condition. When a new error is detected in a device, an identification of the device is stored in a data structure. If another error is detected and causes the devices to be scanned again, the scanning process will skip over the device whose identity is stored in the data structure so that the new error can be located.Type: ApplicationFiled: April 4, 2002Publication date: October 9, 2003Applicant: International Business Machines CorporationInventors: Alongkorn Kitamorn, Ashwini Kulkarni, Gordon D. McIntosh, Kanisha Patel, Michael Anthony Perez
-
Publication number: 20030172322Abstract: A method, apparatus, and computer instructions for processing errors in a hierarchical input/output sub-system having an input/output bridge with a plurality of hardware devices in a level below the bridge. A value is read from a selected register to form a read value in response to detecting an error. The selected register is reset. Each bit in the read value associated with the error is cleared to form a cleared value. The cleared value is written into the selected register such that errors occurring since the register was cleared are preserved. The error registers below the bridge are scanned in response to an absence of an error being detected in a bridge within the input/output sub-system. A determination is made as to whether the error has previously occurred in response to a presence of an error is; being found by scanning the registers below the bridge. The error is reported in response to an absence of a determination that the error has previously occurred.Type: ApplicationFiled: March 7, 2002Publication date: September 11, 2003Applicant: International Business Machines CorporationInventors: Alongkorn Kitamorn, Ashwini Kulkarni, Gordon D. McIntosh, Kanisha Patel, Michael Anthony Perez