Abstract: Methods and system for processing data in a programmable processing pipeline are disclosed. In an embodiment, a method for processing packets in a programmable packet processing pipeline is disclosed. The method involves processing data corresponding to a packet through a match-action pipeline of a programmable packet processing pipeline, and diverting the processing of data corresponding to the packet from the match-action pipeline to a processor core for out-of-pipeline processing.

Abstract: Methods and systems for managing statistics in an I/O system are disclosed. Embodiments of the present technology may include a method for managing statistical data at an I/O system, the method including reading a statistic record from an array of statistic records according to a write request that is held in a register of a register interface. In some embodiments, the write request includes a data element. In some embodiments, the array of statistic records is stored in random access memory (RAM).

Abstract: Methods and systems for memory resource allocation are disclosed. In an embodiment, a method for memory resource allocation involves reading a pool-specific configuration record from an array of memory mapped pool-specific configuration records according to a memory resource allocation request that is held in an address register of a memory mapped register interface, performing a memory resource allocation operation to service the memory resource allocation request, wherein performing the memory resource allocation operation involves interacting with a resource list according to a pointer in the pool-specific configuration record, advancing the pointer after the interaction, and updating the pointer in the pool-specific configuration record with the advanced pointer.

Abstract: Methods and systems for managing statistics in an I/O system are disclosed. Embodiments of the present technology may include a method for managing statistical data at an I/O system, the method including reading a statistic record from an array of statistic records according to a write request that is held in a register of a register interface. In some embodiments, the write request includes a data element. In some embodiments, the array of statistic records is stored in random access memory (RAM).

Abstract: Methods and systems for memory resource allocation are disclosed. In an embodiment, a method for memory resource allocation involves reading a pool-specific configuration record from an array of memory mapped pool-specific configuration records according to a memory resource allocation request that is held in an address register of a memory mapped register interface, performing a memory resource allocation operation to service the memory resource allocation request, wherein performing the memory resource allocation operation involves interacting with a resource list according to a pointer in the pool-specific configuration record, advancing the pointer after the interaction, and updating the pointer in the pool-specific configuration record with the advanced pointer.

Abstract: Methods and system for processing data in a programmable processing pipeline are disclosed. In an embodiment, a method for processing packets in a programmable packet processing pipeline is disclosed. The method involves processing data corresponding to a packet through a match-action pipeline of a programmable packet processing pipeline, and diverting the processing of data corresponding to the packet from the match-action pipeline to a processor core for out-of-pipeline processing.

Abstract: A method is provided in one example embodiment and includes receiving at an interface controller associated with a host server and disposed between the host server and a network element a packet from a sender; processing the packet to identify a rewrite rule to be applied to the packet based on characteristics of the packet; applying the identified rewrite rule to the packet to generate a rewritten packet; and forwarding the rewritten packet toward a next hop. The processing may include classifying the packet, the classifying including identifying at least one of a type of traffic with which the packet is associated and an application with which the packet is associated. Additionally and/or alternatively, the processing may include performing a flow table lookup for the packet to identify a flow with which the packet is associated.

Abstract: Methods and systems are disclosed herein for providing a universal PCIe port. In one example, the same port is configured to accept a PCIe connection as a host or an endpoint symmetrically. Downstream transactions towards an endpoint can be intercepted and a virtual address in the downstream transaction can be translated to a local address using a mapping. The downstream transactions can be forwarded to the endpoint using the local address instead of the virtual address. For endpoints that share the same local address with multiple hosts, a reverse lookup may be provided to determine which one of the hosts a local address corresponds when forwarding upstream transactions. PCIe over Ethernet is provided as one embodiment for allowing remote PCIe endpoints to be associated with a local host transparently.

Abstract: Methods and systems are disclosed herein for providing a universal PCIe port. The same port can be configured to accept a PCIe component as a host or an endpoint (device) symmetrically. The PCIe port can be connected to the host interface or the root complex interface if the PCIe connection is to be configured as a host or an endpoint, respectively. A virtual topology can be provided for a host that associates the host with corresponding endpoints. A mapping between virtual addresses of the corresponding endpoints in the virtual topology and local addresses of the corresponding endpoints is provided.

Abstract: Methods and systems are disclosed herein for providing a universal PCIe port. In one example, the same port is configured to accept a PCIe connection as a host or an endpoint symmetrically. Downstream transactions towards an endpoint can be intercepted and a virtual address in the downstream transaction can be translated to a local address using a mapping. The downstream transactions can be forwarded to the endpoint using the local address instead of the virtual address. For endpoints that share the same local address with multiple hosts, a reverse lookup may be provided to determine which one of the hosts a local address corresponds when forwarding upstream transactions. PCIe over Ethernet is provided as one embodiment for allowing remote PCIe endpoints to be associated with a local host transparently.

Abstract: Techniques are provided for zero copy accelerated processing of packets received at a network device according to a session oriented protocol. Each packet comprises a header field and a payload field. Data in the header field of a byte is evaluated to determine whether a sequence number in the header field is equal to an expected sequence number for a given flow of packets. When the sequence number in the header field is equal to the expected sequence number, header data from the header field is stored in a header ring comprising a plurality of socket buffers and payload data is directed to an application buffer pool according to a pointer in a streaming data ring. When the sequence number in the header field is not equal to the expected sequence number, the header data and the payload data are stored in the header ring.

Abstract: A notification from a source host is received at a network interface device that indicates that a data packet is ready for transmission to a destination host. The data packet may be transmitted to the destination host via the network interface device, and a first completion queue event is generated. The first completion queue event may be used as a trigger to re-transmit the data packet to a port mirroring destination via the network interface device. In another example, a network interface device receives a data packet transmitted from a source host to a destination host. A first completion queue event is generated based on the receipt of the packet, and is used as a trigger to re-transmit the data packet to a port mirroring destination via the network interface device.

Abstract: Methods and systems are disclosed herein for providing a universal PCIe port. In one example, the same port is configured to accept a PCIe connection as a host or an endpoint symmetrically. Downstream transactions towards an endpoint can be intercepted and a virtual address in the downstream transaction can be translated to a local address using a mapping. The downstream transactions can be forwarded to the endpoint using the local address instead of the virtual address. For endpoints that share the same local address with multiple hosts, a reverse lookup may be provided to determine which one of the hosts a local address corresponds when forwarding upstream transactions. PCIe over Ethernet is provided as one embodiment for allowing remote PCIe endpoints to be associated with a local host transparently.

Abstract: Methods and systems are disclosed herein for providing a universal PCIe port. In one example, the same port is configured to accept a PCIe connection as a host or an endpoint symmetrically. Downstream transactions towards an endpoint can be intercepted and a virtual address in the downstream transaction can be translated to a local address using a mapping. The downstream transactions can be forwarded to the endpoint using the local address instead of the virtual address. For endpoints that share the same local address with multiple hosts, a reverse lookup may be provided to determine which one of the hosts a local address corresponds when forwarding upstream transactions. PCIe over Ethernet is provided as one embodiment for allowing remote PCIe endpoints to be associated with a local host transparently.

Abstract: Methods and systems are disclosed herein for providing a universal PCIe port. The same port can be configured to accept a PCIe component as a host or an endpoint (device) symmetrically. The PCIe port can be connected to the host interface or the root complex interface if the PCIe connection is to be configured as a host or an endpoint, respectively. A virtual topology can be provided for a host that associates the host with corresponding endpoints. A mapping between virtual addresses of the corresponding endpoints in the virtual topology and local addresses of the corresponding endpoints is provided.

Abstract: An input/output (IO) device for connecting multiple servers to one or more network interfaces. The device includes a network connection module comprising one or more network interfaces, and a virtual host interface configured to enable communication with a plurality of host servers. The device includes IO controller configured to connect each of the host servers to one or more of the network interfaces such that the connections between each host server and corresponding one or more network interfaces are operationally isolated and independent from one another.

Abstract: The size and location of an envelope of a data block are included in the posting to a second device of a descriptor list entry for the data block, thus allowing the second device to read the data block without having to first read the descriptor list entry. This envelope may be the same size and location of the data block, or this envelope may be larger than the data block. For example, as the size of the posted register may not be large enough to also store all of the bits required to specify the exact size and position of the data block, a larger data block envelope is defined without specifying the exact low order bits of the size and/or location of the data block envelope.

Abstract: In one embodiment a method and apparatus that support virtual services including virtual network interface control functionality for virtual machines running on a server. A method includes receiving a packet at a network interface card from a data communication network, classifying, within the network interface card, the packet to select one of multiple flow tables to which the packet should be assigned to obtain a selected flow table, the classifying being based, at least, on a logical interface with which the packet is associated, processing the packet based on information stored in the selected flow table, and passing the packet to a virtual machine operating on a computer to which the network interface card is communicatively connected, the virtual machine being associated with the logical interface.

Abstract: A failover input/output device and corresponding method are provided to manage failover events of input/output controller devices that operate in accordance with a computer expansion card standard, such as the Peripheral Component Interconnect Express (PCIe) standard. The failover input/output device connects to redundant first and second virtualized input/output controller devices each comprising multiple virtual network interfaces that are in an active or standby state at any given time, and to a computing device that hosts one or more processes. The failover input/output device broadcasts transactions in accordance with the computer expansion card standard initiated from the computing device to the first and second virtualized input/output controller devices.

Abstract: A notification from a source host is received at a network interface device that indicates that a data packet is ready for transmission to a destination host. The data packet may be transmitted to the destination host via the network interface device, and a first completion queue event is generated. The first completion queue event may be used as a trigger to re-transmit the data packet to a port mirroring destination via the network interface device. In another example, a network interface device receives a data packet transmitted from a source host to a destination host. A first completion queue event is generated based on the receipt of the packet, and is used as a trigger to re-transmit the data packet to a port mirroring destination via the network interface device.