Patents by Inventor Michael B. Pulizzi

Michael B. Pulizzi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6137706
    Abstract: A dual-input, automatic-switching power supply comprises a primary power input, a secondary power input, and a power output. Included are first and second DPST mechanical relays and a third DPDT mechanical relay. A first relay input is connected to the primary power input and a corresponding first relay output is connected to a third relay input. A second relay input is connected to the secondary power input and a corresponding second relay output is connected to a different third relay input. The third relay output is connected to the power output. The relays in combination provide a relay moving contact gap spacing, source to source, of at least three millimeters. A first under voltage control module maintains the first and third relays in states causing the primary power input to be connected to the power output as long as voltage from the primary power input remains above a preestablished primary voltage dropout level.
    Type: Grant
    Filed: February 19, 2000
    Date of Patent: October 24, 2000
    Assignee: Pulizzi Engineering Inc
    Inventors: Curt G. Nesbitt, Joseph B. Skorjanec, Michael B. Pulizzi
  • Patent number: 4769555
    Abstract: Multi-time delay power controller apparatus for providing time delayed power-up and power-down for associated electrical equipment, such as computer systems, comprises a power stage configured for connecting to a conventional power outlet, a D.C. power supply connected to an internal D.C. voltage bus, an output stage having a plurality of time delayed outputs and a plurality of time delay turn-on timing stages connected in electrical series with one another between the D.C. bus and ground. Each such stage comprises an R-C circuit and a type 555 integrated circuit which together function as a timer. Included in each stage is a control relay. The energizing coils of the relays in odd numbered stages are connected to ground and of even numbered stages to the D.C. bus. The timing stages are connected so that the timing out of one stage starts the timing of the next-in-sequence stage, the timing of the first-in-sequence stage being started when the apparatus is turned on.
    Type: Grant
    Filed: July 24, 1987
    Date of Patent: September 6, 1988
    Assignee: Pulizzi Engineering Inc.
    Inventors: John D. Pequet, Michael B. Pulizzi, Roger Cook
  • Patent number: 4719364
    Abstract: Multi-time delay power controller apparatus for providing time-delayed power or control signals to associated electrical equipment, such as computers and disc drives, comprises a power stage configured for connecting to a conventional power outlet, a D.C. power supply connected to an interval D.C. voltage bus, an output stage having a plurality of time delayed outputs and a plurality of time delay timing stages connected in electrical series to one another between the D.C. voltage bus and ground. Each such timing stage includes a timing means, and a normally open control relay. Coils of odd numbered timing stages are connected to ground and of even numbered stages to the D.C. voltage bus. The timing stages are connected so that the timing out of one stage starts the timing of the next-in-sequence stage, timing of the first-in-sequence timing stage being started when the apparatus is turned on.
    Type: Grant
    Filed: October 1, 1985
    Date of Patent: January 12, 1988
    Assignee: Pulizzi Engineering, Inc.
    Inventors: John D. Pequet, Michael B. Pulizzi, Roger Cook