Abstract: An apparatus for alerting an operator to the presence of obstacles during the towing or push-back of an aircraft while it is on the ground, including: a self-propelled platform; at least one sensor attached to said platform, configured to sense potential obstacles; and a communication system attached to said platform for transmitting data relating to said sensed obstacles, the communication system being operable to communicate with at least one of: a same said apparatus; an operator control panel; a command centre; the aircraft being towed or pushed-back; and a vehicle towing or pushing-back the aircraft. An aircraft collision avoidance system is used during towing or push-back of an aircraft while it is on the ground, the system includes: at least one apparatus as described; and a carrier configured to carry the at least one apparatus.

Abstract: There is disclosed an apparatus (100) for alerting an operator to the presence of obstacles (50, 52) during the towing or push-back of an aircraft (10) while it is on the ground, the apparatus (100) comprising: a self-propelled platform (110); at least one sensor (120) attached to said platform, configured to sense potential obstacles; and a communication system (130) attached to said platform for transmitting data relating to said sensed obstacles, the communication system being operable to communicate with at least one of: a same said apparatus; an operator control panel; a command centre (70); the aircraft (10) being towed or pushed-back; and a vehicle (20) towing or pushing-back the aircraft. There is also disclosed an aircraft collision avoidance system (200) for use during towing or push-back of an aircraft while it is on the ground, the system comprising: at least one apparatus (100a) as aforesaid; and a carrier (250) configured to carry said at least one apparatus.

Abstract: An all-wheel system for a motor vehicle, with a first electric machine for driving a first drive axle of the motor vehicle; a first electronic power unit for controlling a rotational speed of the first electric machine; a second electric machine for driving a second drive axle of the motor vehicle; a second electronic power unit for controlling the rotational speed of the second electric machine on the basis of the rotational speed of the first electric machine and a specified differential rotational speed between the first electric machine and the second electric machine.

Abstract: Techniques for autonomously tracking and/or predicting an alert event are provided. In one example, a system can comprise a memory that stores computer executable components. The system can also comprise a processor, operably coupled to the memory, and that executes the computer executable components stored in the memory. The computer executable components can comprise a schedule component that determines plan information for a hub of a plurality of hubs, and the hub can be coupled to a device. The computer executable components can further comprise a tracking component that identifies a deviation from the plan information by the hub. Additionally, the computer executable components can comprise a prediction component that determines a probability that the deviation will result in an alert event.

Abstract: A method for testing operating software of a system consisting of a plurality of internal subsystems operating in an environment and controlled by a hardware board using electronic signals and an operating software. The signals are translated into a computer readable format by an interfacing card for each internal subsystem and simulating the internal subsystems by data acquisition modules by a simulating computer, which simulates the environmental conditions to which each module is currently exposed. A scenario based test software module generates a plurality of possible independent test scenarios using Behavioral Programming (BP) and the independent scenarios are interleaved at run time by an execution engine, to thereby automatically create a larger number of dependent and derived scenarios representing only possible combinations which are relevant to the operating conditions and states of the system.

Abstract: A method for testing operating software of a system consisting of a plurality of internal subsystems operating in an environment and controlled by a hardware board using electronic signals and an operating software. The signals are translated into a computer readable format by an interfacing card for each internal subsystem and simulating the internal subsystems by data acquisition modules by a simulating computer, which simulates the environmental conditions to which each module is currently exposed. A scenario based test software module generates a plurality of possible independent test scenarios using Behavioral Programming (BP) and the independent scenarios are interleaved at run time by an execution engine, to thereby automatically create a larger number of dependent and derived scenarios representing only possible combinations which are relevant to the operating conditions and states of the system.

Abstract: Updating cache devices includes a processor to detect a first set of hash functions and a first bit array corresponding to elements of a cache. In some examples, the processor detects a first instruction to add a new element to the cache and modify the first bit array based on the new element. Additionally, the processor processes a first invalidation operation and generates a second bit array and a second set of hash functions, while processing additional instructions. The processor deletes the first bit array and the first set of hash functions in response to detecting that the second bit array and the second set of hash functions have each been generated. Some examples process a second invalidation operation with the second set of hash functions and the second bit array.

Abstract: Techniques for autonomously tracking and/or predicting an alert event are provided. In one example, a system can comprise a memory that stores computer executable components. The system can also comprise a processor, operably coupled to the memory, and that executes the computer executable components stored in the memory. The computer executable components can comprise a schedule component that determines plan information for a hub of a plurality of hubs, and the hub can be coupled to a device. The computer executable components can further comprise a tracking component that identifies a deviation from the plan information by the hub. Additionally, the computer executable components can comprise a prediction component that determines a probability that the deviation will result in an alert event.

Abstract: Techniques for autonomously tracking and/or predicting an alert event are provided. In one example, a system can comprise a memory that stores computer executable components. The system can also comprise a processor, operably coupled to the memory, and that executes the computer executable components stored in the memory. The computer executable components can comprise a schedule component that determines plan information for a hub of a plurality of hubs, and the hub can be coupled to a device. The computer executable components can further comprise a tracking component that identifies a deviation from the plan information by the hub. Additionally, the computer executable components can comprise a prediction component that determines a probability that the deviation will result in an alert event.

Abstract: Techniques for autonomously tracking and/or predicting an alert event are provided. In one example, a system can comprise a memory that stores computer executable components. The system can also comprise a processor, operably coupled to the memory, and that executes the computer executable components stored in the memory. The computer executable components can comprise a schedule component that determines plan information for a hub of a plurality of hubs, and the hub can be coupled to a device. The computer executable components can further comprise a tracking component that identifies a deviation from the plan information by the hub. Additionally, the computer executable components can comprise a prediction component that determines a probability that the deviation will result in an alert event.

Abstract: Updating cache devices includes a processor to detect a first set of hash functions and a first bit array corresponding to elements of a cache. In some examples, the processor detects a first instruction to add a new element to the cache and modify the first bit array based on the new element. Additionally, the processor processes a first invalidation operation and generates a second bit array and a second set of hash functions, while processing additional instructions. The processor deletes the first bit array and the first set of hash functions in response to detecting that the second bit array and the second set of hash functions have each been generated. Some examples process a second invalidation operation with the second set of hash functions and the second bit array.

Abstract: An all-wheel system for a motor vehicle, with a first electric machine for driving a first drive axle of the motor vehicle; a first electronic power unit for controlling a rotational speed of the first electric machine; a second electric machine for driving a second drive axle of the motor vehicle; a second electronic power unit for controlling the rotational speed of the second electric machine on the basis of the rotational speed of the first electric machine and a specified differential rotational speed between the first electric machine and the second electric machine.

Abstract: Updating cache devices includes a processor to detect a first set of hash functions and a first bit array corresponding to elements of a cache. In some examples, the processor detects a first instruction to add a new element to the cache and modify the first bit array based on the new element. Additionally, the processor processes a first invalidation operation and generates a second bit array and a second set of hash functions, while processing additional instructions. The processor deletes the first bit array and the first set of hash functions in response to detecting that the second bit array and the second set of hash functions have each been generated. Some examples process a second invalidation operation with the second set of hash functions and the second bit array.

Abstract: Updating cache devices includes a processor to detect a first set of hash functions and a first bit array corresponding to elements of a cache. In some examples, the processor detects a first instruction to add a new element to the cache and modify the first bit array based on the new element. Additionally, the processor processes a first invalidation operation and generates a second bit array and a second set of hash functions, while processing additional instructions. The processor deletes the first bit array and the first set of hash functions in response to detecting that the second bit array and the second set of hash functions have each been generated. Some examples process a second invalidation operation with the second set of hash functions and the second bit array.

Abstract: Updating cache devices includes a processor to detect a first set of hash functions and a first bit array corresponding to elements of a cache. In some examples, the processor detects a first instruction to add a new element to the cache and modify the first bit array based on the new element. Additionally, the processor processes a first invalidation operation and generates a second bit array and a second set of hash functions, while processing additional instructions. The processor deletes the first bit array and the first set of hash functions in response to detecting that the second bit array and the second set of hash functions have each been generated. Some examples process a second invalidation operation with the second set of hash functions and the second bit array.

Abstract: A processing system includes a data processor, an input, an output, a memory, an operation parser, and a timer manager instance controller. The input receives create-timer-manager-instance (CTMI) commands identifying a number of timers supported by a timer manager instance. The output provides responses including a CTMI response associated with the CTMI command. The operation parser receives the CTMI command from the input. The timer manager instance controller receive a control input from the operation parser based upon the CTMI command, and in response, allocates a block of memory locations in the memory based on the number of timers and provides a CTMI response to the output to indicate that the CTMI response was executed by the timer manager instance controller.

Abstract: A method for operating a drive train for a motor vehicle, with at least one primary drive axle and at least one secondary drive axle, which are operatively connected to each other via a clutch to an adjustable transmission torque. At the same time it is provided that a vibration amplitude of a vibration of the drive train is determined and in a damping operation type of the drive train, the transmission torque is determined from the vibration amplitude and adjusted on the clutch.

Abstract: A method for operating a drivetrain for a motor vehicle, said method includes: reducing a transmission torque transmitted between a primary drive axle operatively connected with a secondary drive axle of the motor vehicle via a clutch configured to allow adjustment of the transmission torque when determining at the secondary drive axle a wheel slip which exceeds a defined slip threshold value.

Abstract: A processing system includes a general purpose instruction based data processor, an input configured to receive a command written by the data processor, a timer manager controller configured to receive the command and to execute the command, and a debug interrupt timer controller (DITC) configured to determine that the command is directed to the DITC and to store configuration information that associates the command with an element of the processing system that is a source of the command, where the configuration information is included in the command.

Abstract: Updating cache devices includes a processor to detect a first set of hash functions and a first bit array corresponding to elements of a cache. In some examples, the processor detects a first instruction to add a new element to the cache and modify the first bit array based on the new element. Additionally, the processor processes a first invalidation operation and generates a second bit array and a second set of hash functions, while processing additional instructions. The processor deletes the first bit array and the first set of hash functions in response to detecting that the second bit array and the second set of hash functions have each been generated. Some examples process a second invalidation operation with the second set of hash functions and the second bit array.