Patents by Inventor Michael Batenburg

Michael Batenburg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10176139
    Abstract: System and method for providing adaptive access to a hardware block on a computer system.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: January 8, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Ron Keidar, Osman Koyuncu, Michael Batenburg
  • Patent number: 9767063
    Abstract: System and method for providing adaptive access to a hardware block on a computer system.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: September 19, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Ron Keidar, Osman Koyuncu, Michael Batenburg
  • Publication number: 20170249183
    Abstract: System and method for providing adaptive access to a hardware block on a computer system.
    Type: Application
    Filed: May 15, 2017
    Publication date: August 31, 2017
    Inventors: Ron KEIDAR, Osman KOYUNCU, Michael BATENBURG
  • Publication number: 20160259750
    Abstract: System and method for providing adaptive access to a hardware block on a computer system.
    Type: Application
    Filed: March 4, 2015
    Publication date: September 8, 2016
    Inventors: Ron KEIDAR, Osman KOYUNCU, Michael BATENBURG
  • Patent number: 8908464
    Abstract: Systems and methods for detecting power attacks related to subnormal read voltage on an integrated circuit. Upon initiating power up of the integrated circuit and prior to reading configuration information from non-volatile memory (NVM), test cells associated with the NVM are read first. The test cells share a common power supply with the NVM and output read values from the test cells are configured to deviate from values pre-programmed in the test cells when a subnormal read voltage is applied on the common power supply. Thus, by comparing the output read values with the pre-programmed values, it can be determined whether voltage of the common power supply is subnormal, wherein configuration information will be read incorrectly at a subnormal read voltage. If the voltage is subnormal, power up is aborted. Otherwise, power up is allowed to proceed by reading the configuration information from the NVM.
    Type: Grant
    Filed: February 12, 2013
    Date of Patent: December 9, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Gregory Ameriada Uvieghara, Michael Batenburg, Esin Terzioglu, Yucong Tao
  • Publication number: 20140226426
    Abstract: Systems and methods for detecting power attacks related to subnormal read voltage on an integrated circuit. Upon initiating power up of the integrated circuit and prior to reading configuration information from non-volatile memory (NVM), test cells associated with the NVM are read first. The test cells share a common power supply with the NVM and output read values from the test cells are configured to deviate from values pre-programmed in the test cells when a subnormal read voltage is applied on the common power supply. Thus, by comparing the output read values with the pre-programmed values, it can be determined whether voltage of the common power supply is subnormal, wherein configuration information will be read incorrectly at a subnormal read voltage. If the voltage is subnormal, power up is aborted. Otherwise, power up is allowed to proceed by reading the configuration information from the NVM.
    Type: Application
    Filed: February 12, 2013
    Publication date: August 14, 2014
    Applicant: QUALCOMM Incorporated
    Inventors: Gregory Ameriada Uvieghara, Michael Batenburg, Esin Terzioglu, Yucong Tao