Patents by Inventor Michael BECKMANN
Michael BECKMANN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11961020Abstract: This disclosure generally relates to a light electric vehicle. More specifically, this disclosure describes how to limit or restrict access to a light electric vehicle based on determined or anticipated environmental conditions. The disclosure also describes how to change one or more capabilities or operating parameters of the light electric vehicle based on determined and/or anticipated environmental conditions.Type: GrantFiled: September 8, 2022Date of Patent: April 16, 2024Assignee: UBER TECHNOLOGIES, INC.Inventors: Nicholas Foley, Michael Beckmann
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Publication number: 20240111591Abstract: Portions of programs, oftentimes referred to as kernels, are written by programmers to target a particular type of compute unit, such as a central processing unit (CPU) core or a graphics processing unit (GPU) core. When executing a kernel, the kernel is separated into multiple parts referred to as workgroups, and each workgroup is provided to a compute unit for execution. Usage of one type of compute unit is monitored and, in response to the one type of compute unit being idle, one or more workgroups targeting another type of compute unit are executed on the one type of compute unit. For example, usage of CPU cores is monitored, and in response to the CPU cores being idle, one or more workgroups targeting GPU cores are executed on the CPU cores.Type: ApplicationFiled: September 30, 2022Publication date: April 4, 2024Applicant: Advanced Micro Devices, Inc.Inventors: Bradford Michael Beckmann, Sooraj Puthoor
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Publication number: 20240095180Abstract: The disclosed computer-implemented method for interpolating register-based lookup tables can include identifying, within a set of registers, a lookup table that has been encoded for storage within the set of registers. The method can also include receiving a request to look up a value in the lookup table and responding to the request by interpolating, from the encoded lookup table stored in the set of registers, a representation of the requested value. Various other methods, systems, and computer-readable media are also disclosed.Type: ApplicationFiled: December 23, 2022Publication date: March 21, 2024Applicant: Advanced Micro Devices, Inc.Inventors: Gabriel H. Loh, Michael Estlick, Jay Fleischman, Michael J. Schulte, Bradford Beckmann, Yasuko Eckert
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Patent number: 11875197Abstract: Systems, apparatuses, and methods for managing a number of wavefronts permitted to concurrently execute in a processing system. An apparatus includes a register file with a plurality of registers and a plurality of compute units configured to execute wavefronts. A control unit of the apparatus is configured to allow a first number of wavefronts to execute concurrently on the plurality of compute units. The control unit is configured to allow no more than a second number of wavefronts to execute concurrently on the plurality of compute units, wherein the second number is less than the first number, in response to detection that thrashing of the register file is above a threshold. The control unit is configured to detect said thrashing based at least in part on a number of registers in use by executing wavefronts that spill to memory.Type: GrantFiled: December 29, 2020Date of Patent: January 16, 2024Assignee: Advanced Micro Devices, Inc.Inventors: Bradford Michael Beckmann, Steven Tony Tye, Brian L. Sumner, Nicolai Hähnle
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Publication number: 20230315536Abstract: To reduce inter- and intra-instruction register bank access conflicts in parallel processors, a processing system includes a remapping circuit to dynamically remap virtual registers to physical registers of a parallel processor during execution of a wavefront. The remapping circuit remaps virtual registers to physical registers at a register mapping table that holds the current set of virtual to physical register mappings based on a list of available registers indicating which physical registers are available for a new mapping and a register mapping policy.Type: ApplicationFiled: March 30, 2022Publication date: October 5, 2023Inventors: Mark Wyse, Bradford Michael Beckmann, John Kalamatianos, Anthony Thomas Gutierrez
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Publication number: 20230153149Abstract: Systems, apparatuses, and methods for dynamic graphics processing unit (GPU) register allocation are disclosed. A GPU includes at least a plurality of compute units (CUs), a control unit, and a plurality of registers for each CU. If a new wavefront requests more registers than are currently available on the CU, the control unit spills registers associated with stack frames at the bottom of a stack since they will not likely be used in the near future. The control unit has complete flexibility determining how many registers to spill based on dynamic demands and can prefetch the upcoming necessary fills without software involvement. Effectively, the control unit manages the physical register file as a cache. This allows younger workgroups to be dynamically descheduled so that older workgroups can allocate additional registers when needed to ensure improved fairness and better forward progress guarantees.Type: ApplicationFiled: January 12, 2023Publication date: May 18, 2023Inventors: Bradford Michael Beckmann, Steven Tony Tye, Brian L. Sumner, Nicolai Hähnle
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Publication number: 20230110376Abstract: Systems, apparatuses, and methods for implementing a multi-tiered approach to cache compression are disclosed. A cache includes a cache controller, light compressor, and heavy compressor. The decision on which compressor to use for compressing cache lines is made based on certain resource availability such as cache capacity or memory bandwidth. This allows the cache to opportunistically use complex algorithms for compression while limiting the adverse effects of high decompression latency on system performance. To address the above issue, the proposed design takes advantage of the heavy compressors for effectively reducing memory bandwidth in high bandwidth memory (HBM) interfaces as long as they do not sacrifice system performance. Accordingly, the cache combines light and heavy compressors with a decision-making unit to achieve reduced off-chip memory traffic without sacrificing system performance.Type: ApplicationFiled: November 23, 2022Publication date: April 13, 2023Inventors: SeyedMohammad SeyedzadehDelcheh, Shomit N. Das, Bradford Michael Beckmann
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Patent number: 11579922Abstract: Systems, apparatuses, and methods for dynamic graphics processing unit (GPU) register allocation are disclosed. A GPU includes at least a plurality of compute units (CUs), a control unit, and a plurality of registers for each CU. If a new wavefront requests more registers than are currently available on the CU, the control unit spills registers associated with stack frames at the bottom of a stack since they will not likely be used in the near future. The control unit has complete flexibility determining how many registers to spill based on dynamic demands and can prefetch the upcoming necessary fills without software involvement. Effectively, the control unit manages the physical register file as a cache. This allows younger workgroups to be dynamically descheduled so that older workgroups can allocate additional registers when needed to ensure improved fairness and better forward progress guarantees.Type: GrantFiled: December 29, 2020Date of Patent: February 14, 2023Assignee: Advanced Micro Devices, Inc.Inventors: Bradford Michael Beckmann, Steven Tony Tye, Brian L. Sumner, Nicolai Hähnle
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Publication number: 20230004879Abstract: This disclosure generally relates to a light electric vehicle. More specifically, this disclosure describes how to limit or restrict access to a light electric vehicle based on determined or anticipated environmental conditions. The disclosure also describes how to change one or more capabilities or operating parameters of the light electric vehicle based on determined and/or anticipated environmental conditions.Type: ApplicationFiled: September 8, 2022Publication date: January 5, 2023Inventors: Nicholas Foley, Michael Beckmann
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Patent number: 11544196Abstract: Systems, apparatuses, and methods for implementing a multi-tiered approach to cache compression are disclosed. A cache includes a cache controller, light compressor, and heavy compressor. The decision on which compressor to use for compressing cache lines is made based on certain resource availability such as cache capacity or memory bandwidth. This allows the cache to opportunistically use complex algorithms for compression while limiting the adverse effects of high decompression latency on system performance. To address the above issue, the proposed design takes advantage of the heavy compressors for effectively reducing memory bandwidth in high bandwidth memory (HBM) interfaces as long as they do not sacrifice system performance. Accordingly, the cache combines light and heavy compressors with a decision-making unit to achieve reduced off-chip memory traffic without sacrificing system performance.Type: GrantFiled: December 23, 2019Date of Patent: January 3, 2023Assignee: Advanced Micro Devices, Inc.Inventors: SeyedMohammad SeyedzadehDelcheh, Shomit N. Das, Bradford Michael Beckmann
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Patent number: 11544106Abstract: Systems, apparatuses, and methods for implementing continuation analysis tasks (CATs) are disclosed. In one embodiment, a system implements hardware acceleration of CATs to manage the dependencies and scheduling of an application composed of multiple tasks. In one embodiment, a continuation packet is referenced directly by a first task. When the first task completes, the first task enqueues a continuation packet on a first queue. The first task can specify on which queue to place the continuation packet. The agent responsible for the first queue dequeues and executes the continuation packet which invokes an analysis phase which is performed prior to determining which dependent tasks to enqueue. If it is determined during the analysis phase that a second task is now ready to be launched, the second task is enqueued on one of the queues. Then, an agent responsible for this queue dequeues and executes the second task.Type: GrantFiled: April 13, 2020Date of Patent: January 3, 2023Assignee: Advanced Micro Devices, Inc.Inventors: Steven Tony Tye, Brian L. Sumner, Bradford Michael Beckmann, Sooraj Puthoor
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Patent number: 11507522Abstract: Systems, apparatuses, and methods for implementing memory request priority assignment techniques for parallel processors are disclosed. A system includes at least a parallel processor coupled to a memory subsystem, where the parallel processor includes at least a plurality of compute units for executing wavefronts in lock-step. The parallel processor assigns priorities to memory requests of wavefronts on a per-work-item basis by indexing into a first priority vector, with the index generated based on lane-specific information. If a given event is detected, a second priority vector is generated by applying a given priority promotion vector to the first priority vector. Then, for subsequent wavefronts, memory requests are assigned priorities by indexing into the second priority vector with lane-specific information. The use of priority vectors to assign priorities to memory requests helps to reduce the memory divergence problem experienced by different work-items of a wavefront.Type: GrantFiled: December 6, 2019Date of Patent: November 22, 2022Assignee: Advanced Micro Devices, Inc.Inventors: Sooraj Puthoor, Kishore Punniyamurthy, Onur Kayiran, Xianwei Zhang, Yasuko Eckert, Johnathan Alsop, Bradford Michael Beckmann
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Patent number: 11443249Abstract: This disclosure generally relates to a light electric vehicle. More specifically, this disclosure describes how to limit or restrict access to a light electric vehicle based on determined or anticipated environmental conditions. The disclosure also describes how to change one or more capabilities or operating parameters of the light electric vehicle based on determined and/or anticipated environmental conditions.Type: GrantFiled: July 31, 2020Date of Patent: September 13, 2022Assignee: Uber Technologies, Inc.Inventors: Nicholas Foley, Michael Beckmann
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Publication number: 20220206841Abstract: Systems, apparatuses, and methods for dynamic graphics processing unit (GPU) register allocation are disclosed. A GPU includes at least a plurality of compute units (CUs), a control unit, and a plurality of registers for each CU. If a new wavefront requests more registers than are currently available on the CU, the control unit spills registers associated with stack frames at the bottom of a stack since they will not likely be used in the near future. The control unit has complete flexibility determining how many registers to spill based on dynamic demands and can prefetch the upcoming necessary fills without software involvement. Effectively, the control unit manages the physical register file as a cache. This allows younger workgroups to be dynamically descheduled so that older workgroups can allocate additional registers when needed to ensure improved fairness and better forward progress guarantees.Type: ApplicationFiled: December 29, 2020Publication date: June 30, 2022Inventors: Bradford Michael Beckmann, Steven Tony Tye, Brian L. Sumner, Nicolai Hähnle
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Publication number: 20220206876Abstract: Systems, apparatuses, and methods for managing a number of wavefronts permitted to concurrently execute in a processing system. An apparatus includes a register file with a plurality of registers and a plurality of compute units configured to execute wavefronts. A control unit of the apparatus is configured to allow a first number of wavefronts to execute concurrently on the plurality of compute units. The control unit is configured to allow no more than a second number of wavefronts to execute concurrently on the plurality of compute units, wherein the second number is less than the first number, in response to detection that thrashing of the register file is above a threshold.Type: ApplicationFiled: December 29, 2020Publication date: June 30, 2022Inventors: Bradford Michael Beckmann, Steven Tony Tye, Brian L. Sumner, Nicolai Hähnle
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Publication number: 20210191869Abstract: Systems, apparatuses, and methods for implementing a multi-tiered approach to cache compression are disclosed. A cache includes a cache controller, light compressor, and heavy compressor. The decision on which compressor to use for compressing cache lines is made based on certain resource availability such as cache capacity or memory bandwidth. This allows the cache to opportunistically use complex algorithms for compression while limiting the adverse effects of high decompression latency on system performance. To address the above issue, the proposed design takes advantage of the heavy compressors for effectively reducing memory bandwidth in high bandwidth memory (HBM) interfaces as long as they do not sacrifice system performance. Accordingly, the cache combines light and heavy compressors with a decision-making unit to achieve reduced off-chip memory traffic without sacrificing system performance.Type: ApplicationFiled: December 23, 2019Publication date: June 24, 2021Inventors: SeyedMohammad SeyedzadehDelcheh, Shomit N. Das, Bradford Michael Beckmann
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Publication number: 20210173796Abstract: Systems, apparatuses, and methods for implementing memory request priority assignment techniques for parallel processors are disclosed. A system includes at least a parallel processor coupled to a memory subsystem, where the parallel processor includes at least a plurality of compute units for executing wavefronts in lock-step. The parallel processor assigns priorities to memory requests of wavefronts on a per-work-item basis by indexing into a first priority vector, with the index generated based on lane-specific information. If a given event is detected, a second priority vector is generated by applying a given priority promotion vector to the first priority vector. Then, for subsequent wavefronts, memory requests are assigned priorities by indexing into the second priority vector with lane-specific information. The use of priority vectors to assign priorities to memory requests helps to reduce the memory divergence problem experienced by different work-items of a wavefront.Type: ApplicationFiled: December 6, 2019Publication date: June 10, 2021Inventors: Sooraj Puthoor, Kishore Punniyamurthy, Onur Kayiran, Xianwei Zhang, Yasuko Eckert, Johnathan Alsop, Bradford Michael Beckmann
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Publication number: 20210095978Abstract: Systems and methods for repositioning light electric vehicles are provided. A method can include obtaining, by a computing system, sensor data from one or more sensors located onboard an autonomous light electric vehicle, determining, by the computing system, one or more navigational instructions to reposition the autonomous light electric vehicle based at least in part on the sensor data, and causing, by the computing system, the autonomous light electric vehicle to initiate travel based at least in part on the one or more navigational instructions. The one or more navigational instructions can be one or more navigational instructions associated with repositioning the autonomous light electric vehicle at a light electric vehicle designated parking location, a light electric vehicle charging station, a light electric vehicle collection point, a light electric vehicle rider location, or a light electric vehicle supply positioning location.Type: ApplicationFiled: September 26, 2019Publication date: April 1, 2021Inventors: Nicholas G. Letwin, Eric Meyhofer, Sean Hyde, Michael Beckmann, Jahan Khanna, Sylvia Wu, Zoran Martinovic, Nicholas Foley, Lucie Zikova
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Publication number: 20210035032Abstract: This disclosure generally relates to a light electric vehicle. More specifically, this disclosure describes how to limit or restrict access to a light electric vehicle based on determined or anticipated environmental conditions. The disclosure also describes how to change one or more capabilities or operating parameters of the light electric vehicle based on determined and/or anticipated environmental conditions.Type: ApplicationFiled: July 31, 2020Publication date: February 4, 2021Applicant: Uber Technologies, Inc.Inventors: Nicholas FOLEY, Michael BECKMANN
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Publication number: 20200379802Abstract: Systems, apparatuses, and methods for implementing continuation analysis tasks (CATs) are disclosed. In one embodiment, a system implements hardware acceleration of CATs to manage the dependencies and scheduling of an application composed of multiple tasks. In one embodiment, a continuation packet is referenced directly by a first task. When the first task completes, the first task enqueues a continuation packet on a first queue. The first task can specify on which queue to place the continuation packet. The agent responsible for the first queue dequeues and executes the continuation packet which invokes an analysis phase which is performed prior to determining which dependent tasks to enqueue. If it is determined during the analysis phase that a second task is now ready to be launched, the second task is enqueued on one of the queues. Then, an agent responsible for this queue dequeues and executes the second task.Type: ApplicationFiled: April 13, 2020Publication date: December 3, 2020Inventors: Steven Tony Tye, Brian L. Sumner, Bradford Michael Beckmann, Sooraj Puthoor