Patents by Inventor Michael Bowes
Michael Bowes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250379047Abstract: The methods and devices described herein provide for thin and high-quality oxide layers with controlled interfacial roughness. In some embodiments, the aforementioned oxide layers are formed using radical oxidation processes with slow oxidation rates and relatively low-to-moderate temperatures, followed by nitrogen (N2) annealing at relatively high temperatures to densify the oxide layer(s) while also relieving (e.g., relaxing) interfacial stresses by inducing the viscous flow of the oxide.Type: ApplicationFiled: June 5, 2024Publication date: December 11, 2025Inventors: Jae Young PARK, Young Jun CHOI, Ho Chang LEE, Jiseon PARK, Hansel LO, Johanes F. SWENBERG, Paola DE CECCO, Michael BOWES, Andy LO, John Timothy BOLAND, Rene GEORGE
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Patent number: 12476143Abstract: Provided herein are methods and apparatuses for controlling uniformity of processing at an edge region of a semiconductor wafer. In some embodiments, the methods include providing a backside inhibition gas as part of a deposition-inhibition-deposition (DID) sequence.Type: GrantFiled: February 17, 2021Date of Patent: November 18, 2025Assignee: Lam Research CorporationInventors: Gang Liu, Anand Chandrashekar, Tsung-Han Yang, Michael Bowes, Leonard Wai Fung Kho, Eric H. Lenz
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Patent number: 12261081Abstract: Methods for selective inhibition control in semiconductor manufacturing are provided. An example method includes providing a substrate including a feature having one or more feature openings and a feature interior. A nucleation layer is formed on a surface of the feature interior. Based on a differential inhibition profile, a nonconformal bulk layer is selectively formed on a surface of the nucleation layer to leave a region of the nucleation layer covered, and a region of the nucleation layer uncovered by the nonconformal bulk layer. An inhibition layer is selectively formed on the covered and uncovered regions of the nucleation layer. Tungsten is deposited in the feature in accordance with the differential inhibition profile.Type: GrantFiled: February 13, 2020Date of Patent: March 25, 2025Assignee: Lam Research CorporationInventors: Tsung-Han Yang, Michael Bowes, Gang Liu, Anand Chandrashekar
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Publication number: 20240261030Abstract: A method of assessment of a joint may include receiving image data related to one or more images of the joint; determining a B-score, osteophyte volume, and/or a joint-space width based on the image data; generating a first artificial model of the joint based on the determined score, osteophyte volume, and/or joint-space width; and displaying on an electronic display a graphical user interface (GUI). The GUI may include a display of the first artificial model of the joint.Type: ApplicationFiled: January 31, 2024Publication date: August 8, 2024Applicant: MAKO Surgical CorporationInventors: Alison LONG, Michael BOWES, Christopher WOLSTENHOLME, Kevin DE SOUZA, Arman MOTESHAREI, Graham VINCENT, Nathalie WILLEMS, Daniele DE MASSARI
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Patent number: 12002679Abstract: Methods of depositing a tungsten nucleation layers that achieve very good step coverage are provided. The methods involve a sequence of alternating pulses of a tungsten-containing precursor and a boron-containing reducing agent, while co-flowing hydrogen (H2) with the boron-containing reducing agent. The H2 flow is stopped prior to the tungsten-containing precursor flow. By co-flowing H2 with the boron-containing reducing agent but not with the tungsten-containing precursor flow, a parasitic CVD component is reduced, resulting in a more self-limiting process. This in turn improves step coverage and conformality of the nucleation layer. Related apparatuses are also provided.Type: GrantFiled: April 7, 2020Date of Patent: June 4, 2024Assignee: Lam Research CorporationInventors: Michael Bowes, Tsung-Han Yang, Anand Chandrashekar, Xing Zhang
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Publication number: 20230130557Abstract: Providing herein are methods of delivery of gas reactants to a processing chamber and related apparatus.Type: ApplicationFiled: March 3, 2021Publication date: April 27, 2023Inventors: Krishna BIRRU, Leonard Wai Fung KHO, Anand CHANDRASHEKAR, Michael BOWES, Yong SUN, Xing ZHANG, Sumit Subhash SINGH
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Publication number: 20220415711Abstract: Provided herein are methods and apparatuses for controlling uniformity of processing at an edge region of a semiconductor wafer. In some embodiments, the methods include providing a backside inhibition gas as part of a deposition-inhibition-deposition (DID) sequence.Type: ApplicationFiled: February 17, 2021Publication date: December 29, 2022Inventors: Gang LIU, Anand CHANDRASHEKAR, Tsung-Han YANG, Michael BOWES, Leonard Wai Fung KHO, Eric H. LENZ
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Publication number: 20220181158Abstract: Methods of depositing a tungsten nucleation layers that achieve very good step coverage are provided. The methods involve a sequence of alternating pulses of a tungsten-containing precursor and a boron-containing reducing agent, while co-flowing hydrogen (H2) with the boron-containing reducing agent. The H2 flow is stopped prior to the tungsten-containing precursor flow. By co-flowing H2 with the boron-containing reducing agent but not with the tungsten-containing precursor flow, a parasitic CVD component is reduced, resulting in a more self-limiting process. This in turn improves step coverage and conformality of the nucleation layer. Related apparatuses are also provided.Type: ApplicationFiled: April 7, 2020Publication date: June 9, 2022Applicant: Lam Research CorporationInventors: Michael Bowes, Tsung-Han Yang, Anand Chandrashekar, Xing Zhang
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Publication number: 20220172987Abstract: Systems and methods for selective inhibition control in semiconductor manufacturing are provided. An example method includes providing a substrate including a feature having one or more feature openings and a feature interior. A nucleation layer is formed on a surface of the feature interior. Based on a differential inhibition profile, a nonconformal bulk layer is selectively formed on a surface of the nucleation layer to leave a region of the nucleation layer covered, and a region of the nucleation layer uncovered by the nonconformal bulk layer. An inhibition layer is selectively formed on the covered and uncovered regions of the nucleation layer. Tungsten is deposited in the feature in accordance with the differential inhibition profile.Type: ApplicationFiled: February 13, 2020Publication date: June 2, 2022Inventors: Tsung-Han Yang, Michael Bowes, Gang Liu, Anand Chandrashekar
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Patent number: 10977405Abstract: Provided herein are systems and methods for optimizing feature fill processes. The feature fill optimization systems and methods may be used to optimize feature fill from a small number of patterned wafer tests. The systems and methods may be used for optimizing enhanced feature fill processes including those that include inhibition and/or etch operations along with deposition operations. Results from experiments may be used to calibrate a feature scale behavioral model. Once calibrated, parameter space may be iteratively explored to optimize the process.Type: GrantFiled: January 29, 2019Date of Patent: April 13, 2021Assignee: Lam Research CorporationInventors: Michael Bowes, Atashi Basu, Kapil Sawlani, Dongyao Li, Anand Chandrashekar, David M. Fried, Michal Danek
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Publication number: 20200242209Abstract: Provided herein are systems and methods for optimizing feature fill processes. The feature fill optimization systems and methods may be used to optimize feature fill from a small number of patterned wafer tests. The systems and methods may be used for optimizing enhanced feature fill processes including those that include inhibition and/or etch operations along with deposition operations. Results from experiments may be used to calibrate a feature scale behavioral model. Once calibrated, parameter space may be iteratively explored to optimize the process.Type: ApplicationFiled: January 29, 2019Publication date: July 30, 2020Inventors: Michael Bowes, Atashi Basu, Kapil Sawlani, Dongyao Li, Anand Chandrashekar, David M. Fried, Michal Danek
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Publication number: 20060114906Abstract: A network device for processing packets. The network devices includes a ingress module for performing lookups for layer 2 switching and performing operations for maintaining a layer 2 table. When the ingress module updates the layer 2 table, the ingress module records the operation performed on the layer 2 table in a modification buffer. Entries are added to the modification buffer when the layer 2 table is modified and in the order in which the layer 2 table was modified. The network device thus enables reconstruction of the layer 2 table by performing the operations in the modification buffer.Type: ApplicationFiled: April 6, 2005Publication date: June 1, 2006Inventors: Michael Bowes, Eric Baden, John Dull, Curt McDowell
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Publication number: 20060114914Abstract: A network device for processing packets. The network device includes an ingress module for performing switching functions on an incoming packet. The network device also includes a memory management unit for storing packets and performing resource checks on each packet and an egress module for performing packet modification and transmitting the packet to an appropriate destination port. Each of the ingress module, memory management unit and egress module includes multiple cycles for processing instructions and each of the ingress module, memory management unit and egress module processes one packet every clock cycle.Type: ApplicationFiled: April 7, 2005Publication date: June 1, 2006Inventors: Anupam Anand, John Dull, Eric Baden, Michael Bowes
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Publication number: 20050122966Abstract: A network switch for switching packets from a source to a destination includes a source port for receiving an incoming packet from a source, a destination port which contains a path to a destination for the packet, and a filter unit for constructing and applying a filter to selected fields of the incoming packet. The filter unit further includes filtering logic for selecting desired fields of the incoming packet and copying selected field information therefrom. The filtering logic also constructs a field value based upon the selected fields, and applies a plurality stored field masks on the field value. The switch additionally includes a rules table which contains a plurality of rules therein. The filtering logic is configured to perform lookups of the rules table in order to determine actions which must be taken based upon the result of a comparison between the field value and the stored filter masks and the rules table lookup.Type: ApplicationFiled: January 13, 2005Publication date: June 9, 2005Inventor: Michael Bowes