Patents by Inventor Michael Brian Galles

Michael Brian Galles has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10944696
    Abstract: Methods and network interface modules for processing packet headers are provided. The method comprises: receiving a packet comprising a header and a payload; generating, using the header, an initial packet header vector (PHV); providing the initial PHV to a pipeline comprising a plurality of processing stages; and processing the initial PHV in the pipeline, wherein the processing comprises, for a current processing stage in the plurality of processing stages: receiving, by the current processing stage, an input PHV, wherein the input PHV (i) is the initial PHV or a modified version of the initial PHV and (ii) comprises one or more flits, and applying a feature to the input PHV to generate an output PHV, including increasing an initial length of the input PHV if the initial length is not sufficient to apply the feature.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: March 9, 2021
    Assignee: PENSANDO SYSTEMS INC.
    Inventor: Michael Brian Galles
  • Publication number: 20200336425
    Abstract: Methods and devices for processing packets with reduced data stalls are provided. The method comprises: (a) receiving a packet comprising a header portion and a payload portion, wherein the header portion is used to generate a packet header vector; (b) producing a table result by performing packet match operations, wherein the table result is generated based at least in part on the packet header vector and data stored in a match table; (c) receiving, at a match processing unit, the table result and an address of a set of instructions associated with the match table; and (d) performing, by the match processing unit, one or more actions in response to the set of instructions until completion of the instructions, wherein the one or more actions comprise modifying the header portion, updating memory based data structure or initiating an event.
    Type: Application
    Filed: November 5, 2018
    Publication date: October 22, 2020
    Inventors: Michael Brian GALLES, David CLEAR
  • Publication number: 20200267098
    Abstract: Methods and network interface modules for processing packet headers are provided. The method comprises: receiving a packet comprising a header and a payload; generating, using the header, an initial packet header vector (PHV); providing the initial PHV to a pipeline comprising a plurality of processing stages; and processing the initial PHV in the pipeline, wherein the processing comprises, for a current processing stage in the plurality of processing stages: receiving, by the current processing stage, an input PHV, wherein the input PHV (i) is the initial PHV or a modified version of the initial PHV and (ii) comprises one or more flits, and applying a feature to the input PHV to generate an output PHV, including increasing an initial length of the input PHV if the initial length is not sufficient to apply the feature.
    Type: Application
    Filed: February 19, 2019
    Publication date: August 20, 2020
    Inventor: Michael Brian Galles
  • Patent number: 8364877
    Abstract: A method includes receiving a first interrupt request from a first device instance of a plurality of device instances. The first interrupt request is requesting an interrupt of a processor. The method also includes updating a bit vector based on the first interrupt request. The bit vector comprises a plurality of bits representing an accumulation of interrupt requests. The method further includes generating a gang interrupt comprising the updated bit vector. The method also includes transmitting the gang interrupt to call a first device driver associated with the first interrupt request based on the bits in the bit vector.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: January 29, 2013
    Assignee: Cisco Technology, Inc.
    Inventors: Shrijeet Mukherjee, Michael Brian Galles, David Scott Feldman, J. Bradley Smith
  • Publication number: 20110145462
    Abstract: A method includes receiving a first interrupt request from a first device instance of a plurality of device instances. The first interrupt request is requesting an interrupt of a processor. The method also includes updating a bit vector based on the first interrupt request. The bit vector comprises a plurality of bits representing an accumulation of interrupt requests. The method further includes generating a gang interrupt comprising the updated bit vector. The method also includes transmitting the gang interrupt to call a first device driver associated with the first interrupt request based on the bits in the bit vector.
    Type: Application
    Filed: December 16, 2009
    Publication date: June 16, 2011
    Applicant: Cisco Technology, Inc.
    Inventors: Shrijeet Mukherjee, Michael Brian Galles, David Scott Feldman, J. Bradley Smith