Patents by Inventor Michael Bushman
Michael Bushman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11606096Abstract: The disclosure relates to technology for power supply for a voltage controller oscillator (VCO). A peak detector circuit determines the amplitude of the output for the VCO, which is compared to a reference value in an automatic gain control loop. An input voltage for the VCO is determined based on a difference between the reference value and the output of the peak detector circuit. The peak detector circuit can be implemented using parasitic bipolar devices in an integrated circuit formed in a CMOS process.Type: GrantFiled: November 4, 2020Date of Patent: March 14, 2023Assignee: Huawei Technologies Co., Ltd.Inventor: Michael Bushman
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Patent number: 11515838Abstract: A resonant tank includes a first capacitor formed on a semiconductor substrate, a first inductor formed on the semiconductor substrate, a second capacitor formed on the semiconductor substrate, and a second inductor formed on the semiconductor substrate. The first capacitor, the first inductor, the second capacitor, and the second inductor are connected in a ring configuration, with each capacitor connected between a pair of the inductors and with each inductor connected between a pair of the capacitors. An amplifier circuit is coupled to the resonant tank and configured to amplify a signal in the resonant tank.Type: GrantFiled: February 5, 2022Date of Patent: November 29, 2022Assignee: Futurewei Technologies, Inc.Inventors: Michael Bushman, James Caldwell
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Publication number: 20220247353Abstract: A resonant tank includes a first capacitor formed on a semiconductor substrate, a first inductor formed on the semiconductor substrate, a second capacitor formed on the semiconductor substrate, and a second inductor formed on the semiconductor substrate. The first capacitor, the first inductor, the second capacitor, and the second inductor are connected in a ring configuration, with each capacitor connected between a pair of the inductors and with each inductor connected between a pair of the capacitors. An amplifier circuit is coupled to the resonant tank and configured to amplify a signal in the resonant tank.Type: ApplicationFiled: February 5, 2022Publication date: August 4, 2022Applicant: FUTUREWEI TECHNOLOGIES, INC.Inventors: Michael Bushman, James Caldwell
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Patent number: 11271524Abstract: A resonant tank includes a first capacitor formed on a semiconductor substrate, a first inductor formed on the semiconductor substrate, a second capacitor formed on the semiconductor substrate, and a second inductor formed on the semiconductor substrate. The first capacitor, the first inductor, the second capacitor, and the second inductor are connected in a ring configuration, with each capacitor connected between a pair of the inductors and with each inductor connected between a pair of the capacitors. An amplifier circuit is coupled to the resonant tank and configured to amplify a signal in the resonant tank.Type: GrantFiled: February 15, 2021Date of Patent: March 8, 2022Assignee: FUTUREWEI TECHNOLOGIES, INC.Inventors: Michael Bushman, James Caldwell
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Publication number: 20210242832Abstract: A resonant tank includes a first capacitor formed on a semiconductor substrate, a first inductor formed on the semiconductor substrate, a second capacitor formed on the semiconductor substrate, and a second inductor formed on the semiconductor substrate. The first capacitor, the first inductor, the second capacitor, and the second inductor are connected in a ring configuration, with each capacitor connected between a pair of the inductors and with each inductor connected between a pair of the capacitors. An amplifier circuit is coupled to the resonant tank and configured to amplify a signal in the resonant tank.Type: ApplicationFiled: February 15, 2021Publication date: August 5, 2021Applicant: FUTUREWEI TECHNOLOGIES, INC.Inventors: Michael Bushman, James Caldwell
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Publication number: 20210050856Abstract: The disclosure relates to technology for power supply for a voltage controller oscillator (VCO). A peak detector circuit determines the amplitude of the output for the VCO, which is compared to a reference value in an automatic gain control loop. An input voltage for the VCO is determined based on a difference between the reference value and the output of the peak detector circuit. The peak detector circuit can be implemented using parasitic bipolar devices in an integrated circuit formed in a CMOS process.Type: ApplicationFiled: November 4, 2020Publication date: February 18, 2021Applicant: Huawei Technologies Co., Ltd.Inventor: Michael Bushman
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Patent number: 10924059Abstract: A resonant tank includes a first capacitor formed on a semiconductor substrate, a first inductor formed on the semiconductor substrate, a second capacitor formed on the semiconductor substrate, and a second inductor formed on the semiconductor substrate. The first capacitor, the first inductor, the second capacitor, and the second inductor are connected in a ring configuration, with each capacitor connected between a pair of the inductors and with each inductor connected between a pair of the capacitors. An amplifier circuit is coupled to the resonant tank and configured to amplify a signal in the resonant tank.Type: GrantFiled: July 9, 2018Date of Patent: February 16, 2021Assignee: Futurewei Technologies, Inc.Inventors: Michael Bushman, James Caldwell
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Patent number: 10693470Abstract: The disclosure relates to technology for power supply for a voltage controller oscillator (VCO), where the power supply has a closed loop mode and an open loop mode. In closed loop mode, a peak detector circuit determines the amplitude of the output for the VCO, which is compared to a reference value in an automatic gain control loop. An input voltage for the VCO is determined based on a difference between the reference value and the output of the peak detector circuit. The peak detector circuit can be implemented using parasitic bipolar devices in an integrated circuit formed in a CMOS process. While operating in the closed loop mode, a controller monitors the input voltage and, when the input voltage is stabilized, the controller uses this input voltage value determined in open loop mode.Type: GrantFiled: July 30, 2018Date of Patent: June 23, 2020Assignee: Futurewei Technologies, Inc.Inventors: Lawrence E Connell, Michael Bushman
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Patent number: 10686453Abstract: The disclosure relates to technology for power supply for a voltage controller oscillator (VCO). A peak detector circuit determines the amplitude of the output for the VCO, which is compared to a reference value in an automatic gain control loop. An input voltage for the VCO is determined based on a difference between the reference value and the output of the peak detector circuit. The peak detector circuit can be implemented using parasitic bipolar devices in an integrated circuit formed in a CMOS process.Type: GrantFiled: July 30, 2018Date of Patent: June 16, 2020Assignee: Futurewei Technologies, Inc.Inventor: Michael Bushman
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Publication number: 20200036385Abstract: The disclosure relates to technology for power supply for a voltage controller oscillator (VCO). A peak detector circuit determines the amplitude of the output for the VCO, which is compared to a reference value in an automatic gain control loop. An input voltage for the VCO is determined based on a difference between the reference value and the output of the peak detector circuit. The peak detector circuit can be implemented using parasitic bipolar devices in an integrated circuit formed in a CMOS process.Type: ApplicationFiled: July 30, 2018Publication date: January 30, 2020Applicant: Futurewei Technologies, Inc.Inventor: Michael Bushman
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Publication number: 20200036383Abstract: The disclosure relates to technology for power supply for a voltage controller oscillator (VCO), where the power supply has a closed loop mode and an open loop mode. In closed loop mode, a peak detector circuit determines the amplitude of the output for the VCO, which is compared to a reference value in an automatic gain control loop. An input voltage for the VCO is determined based on a difference between the reference value and the output of the peak detector circuit. The peak detector circuit can be implemented using parasitic bipolar devices in an integrated circuit formed in a CMOS process. While operating in the closed loop mode, a controller monitors the input voltage and, when the input voltage is stabilized, the controller uses this input voltage value determined in open loop mode.Type: ApplicationFiled: July 30, 2018Publication date: January 30, 2020Applicant: Futurewei Technologies, Inc.Inventors: Lawrence E Connell, Michael Bushman
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Publication number: 20200014330Abstract: A resonant tank includes a first capacitor formed on a semiconductor substrate, a first inductor formed on the semiconductor substrate, a second capacitor formed on the semiconductor substrate, and a second inductor formed on the semiconductor substrate. The first capacitor, the first inductor, the second capacitor, and the second inductor are connected in a ring configuration, with each capacitor connected between a pair of the inductors and with each inductor connected between a pair of the capacitors. An amplifier circuit is coupled to the resonant tank and configured to amplify a signal in the resonant tank.Type: ApplicationFiled: July 9, 2018Publication date: January 9, 2020Applicant: Futurewei Technologies, Inc.Inventors: Michael Bushman, James Caldwell
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Patent number: 9178554Abstract: A method for differential buffer phase correction comprises generating a pair of differential signals from a local oscillator, applying one of the signals to a first inverter and the other signal to a second inverter of a buffer through a differential pair of lines, applying a first positive feedback signal to the first inverter through a first feedback capacitor, wherein the first positive feedback signal is generated from an output of the second inverter and applying a second positive feedback signal to the second inverter through a second feedback capacitor, wherein the second positive feedback signal is generated from an output of the first inverter.Type: GrantFiled: March 28, 2014Date of Patent: November 3, 2015Assignee: Futurewei Technologies, Inc.Inventors: Daniel Mccarthy, Michael Bushman, Lawrence Connell
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Publication number: 20150280762Abstract: A method for differential buffer phase correction comprises generating a pair of differential signals from a local oscillator, applying one of the signals to a first inverter and the other signal to a second inverter of a buffer through a differential pair of lines, applying a first positive feedback signal to the first inverter through a first feedback capacitor, wherein the first positive feedback signal is generated from an output of the second inverter and applying a second positive feedback signal to the second inverter through a second feedback capacitor, wherein the second positive feedback signal is generated from an output of the first inverter.Type: ApplicationFiled: March 28, 2014Publication date: October 1, 2015Applicant: FutureWei Technologies, Inc.Inventors: Daniel Mccarthy, Michael Bushman, Lawrence Connell
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Publication number: 20070096841Abstract: A frequency source having a fast start-up time and low noise in steady state is presented. The frequency source includes an oscillator and a hybrid automatic gain control (AGC) loop that switches between an analog AGC loop at oscillator start up and a digital AGC loop at steady state operation. The analog AGC loop includes a peak detector connected to the oscillator and an error integrator integrating the difference between the peak detector output and a reference voltage. The digital AGC loop includes a comparator comparing the peak detector output and high/low reference voltages, an oscillator counter providing a timer signal, a digital-to-analog converter (DAC) supplied with a digital word, and a low pass filter between the DAC and the oscillator. The timer signal causes a multiplexer to select either the analog AGC loop or the digital AGC loop.Type: ApplicationFiled: October 28, 2005Publication date: May 3, 2007Inventors: Lawrence Connell, Daniel McCarthy, Michael Bushman
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Patent number: 5731742Abstract: A temperature compensation circuit (10) for a crystal oscillator programmed by a single component (12), such as a resistor. The component (12) provides a voltage to an A/D converter (26). The digital signals (28) from the A/D converter (26) are divided and directed to separate signal generators (44,46,48,50,56) which control different aspects of the temperature compensation circuit (10). These aspects include a hot, cold, linear, balance and warp adjustment. The temperature compensation circuit (10) drives a varactor (18) which reactively loads a crystal oscillator (14) to compensate frequency over temperature. By using a single component (12) to program the circuit (10), an EEPROM is no longer needed which saves IC space and reduces IC processing steps, and the use of multiple external components to perform a compensation is avoided which further saves physical space.Type: GrantFiled: December 17, 1996Date of Patent: March 24, 1998Assignee: Motorola Inc.Inventors: Carl Wojewoda, Timothy Collins, Michael Bushman